Semiconductor Process Analysis via Non-Negative Matrix Factorization
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Solution Overview
Problem
In semiconductor manufacturing, comparing substrate inspection results from manufacturing lines and product inspections is challenging due to differences in inspection specifications, making it difficult to identify defective fabrication processes directly.
Innovation Solution
A semiconductor process analysis device that performs factoring on inspection result groups using non-negative matrix factorization (NMF) to calculate appearance information and association between different inspection results, allowing for the comparison of feature patterns across varying inspection specifications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If inspection results from manufacturing line and product inspection are directly compared, then yield analysis can be performed, but the comparison is difficult due to different inspection specifications
Solution Approach 1:
The patent transforms inspection results by changing their parameters through feature extraction and normalization. Different inspection specifications are converted into common feature representations, allowing accurate comparison despite original specification differences. This involves extracting meaningful features from various inspection data formats and normalizing them to a common scale and structure.
Solution Approach 2:
The patent introduces an intermediary processing layer that mediates between different inspection specifications and the comparison process. This intermediary layer performs feature extraction, normalization, and transformation, converting diverse inspection results into a unified format that can be accurately compared. The intermediary processing enables comparison without requiring direct compatibility between different inspection systems.
2Ease of operation
If inspection specifications are standardized across all inspections, then comparison becomes easier, but flexibility in inspection methods is reduced
Solution Approach 1:
The patent segments the inspection process into distinct stages: original inspection with various specifications, feature extraction, normalization, and comparison. Each stage maintains appropriate flexibility while the transition between stages ensures comparability. The segmentation allows different inspection methods to coexist while their results are systematically transformed for accurate comparison through feature-based representation.
Solution Approach 2:
The patent transitions inspection results from their original specification dimension to a feature representation dimension. Instead of comparing raw inspection data with different specifications, the system extracts features that capture the essential characteristics and represents them in a unified dimensional space, enabling comparison while preserving the original inspection method diversity.
Data Source
AI summary
A semiconductor process analysis device of an embodiment includes a memory and a processor connected to the memory. The processor performs factoring to inspection result groups resulting from inspections of a substrate group, the inspections including an inspection of a fabrication process of a semiconductor integrated circuit. The inspection result groups are first distribution groups resulting from a single inspection of each substrate of the substrate group. Each first distribution represents a distribution of inspection data on a substrate surface. The factoring includes calculating, from the first distribution groups, for each of one or more second distributions, appearance information containing a degree of appearance of one of the one or more second distributions in each substrate. The processor calculates a degree of association between two items of the appearance information, the two items respectively corresponding to different inspection result groups among the inspection result groups.