Vertical Semiconductor Rear Contact Integration
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Solution Overview
Problem
The production of electrical connections in semiconductor half bridges is complex and costly, and the inductivity of these connections leads to undesirable electromagnetic stray radiation.
Innovation Solution
A semiconductor arrangement featuring controllable vertical n-channel semiconductor chips with rear side contacts electrically connected to each other, using a series connection and low inductivity lead frames to reduce electromagnetic interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional electrical connections are used in semiconductor half bridges, then the production process can be established, but the production becomes complex and costly, and inductivity causes undesirable electromagnetic stray radiation
Solution Approach 1:
The patent merges the electrical connection function into the semiconductor chip structure itself by integrating metallization layers and contact regions directly within the chip. This eliminates the need for separate external electrical connections, thereby simplifying production and reducing inductivity that causes electromagnetic radiation.
Solution Approach 2:
The patent transitions from traditional planar electrical connections to a three-dimensional vertical structure by implementing through-silicon vias and stacked metallization layers. This vertical integration reduces the physical path length of electrical connections, minimizing inductivity and electromagnetic radiation while simplifying the overall assembly process.
2Reliability
If conventional electrical connections are used in semiconductor half bridges, then the connections can be established, but the inductivity of these connections causes undesirable electromagnetic stray radiation
Solution Approach 1:
The electrical connection path is merged with the semiconductor active regions, creating a unified structure where the metallization layers are directly integrated with the transistor source, drain, and gate regions. This integration maintains reliable electrical connection while minimizing the loop area and inductivity that generate electromagnetic radiation.
Solution Approach 2:
The patent changes the physical parameters of the electrical connection by reducing the connection length and optimizing the metallization layer thickness and conductivity. These parameter changes decrease the inductivity of the connection path, thereby reducing electromagnetic stray radiation while maintaining connection reliability.
Data Source
AI summary
A semiconductor arrangement includes a first and second controllable vertical n-channel semiconductor chip. Each of the controllable vertical n-channel semiconductor chips has a front side, a rear side opposite the front side, a front side main contact arranged on the front side, a rear side main contact arranged on the rear side, and a gate contact arranged on the front side for controlling an electric current between the front side main contact and the rear side main contact. The rear side contacts of the first and second semiconductor chips are electrically connected to one another.


