Semiconductor Device With Recessed Stacked Elements And Columnar Conductors
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Solution Overview
Problem
The high cost and limited flexibility of existing semiconductor devices due to the need for frequent die modifications when changing wire configurations, combined with the constraint of forming three-dimensional structures using metal wires, hinder cost reduction and miniaturization efforts.
Innovation Solution
A semiconductor device design featuring a substrate with recessed areas and columnar conductive portions that penetrate through a sealing resin, allowing for the integration of elements without the need for external wires, enabling reduced production costs and enhanced configuration flexibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If metal wires are used for interconnection with standard die punching process, then good manufacturing efficacy and accuracy are achieved, but the device complexity increases and adaptability decreases when function changes require wire configuration modifications
Solution Approach 1:
The patent transitions from planar wire interconnections to three-dimensional stacked configurations. Multiple elements are arranged in vertical stacks with interlayer conductors connecting different levels, enabling complex functionality without requiring extensive wire routing on a single plane. This dimensional change provides configuration flexibility while maintaining manufacturing precision through standardized stacking processes.
Solution Approach 2:
The patent creates a universal interconnection structure where the same basic stacking and conductor formation process can accommodate different element configurations and functional requirements. By using standardized interlayer conductors and modular element stacks, the system can be adapted to various functions without requiring custom wire routing for each application.
2Strength
If metal plates are used to manufacture wires, then smooth shape and structural integrity are achieved, but the device complexity increases and miniaturization becomes difficult
Solution Approach 1:
The patent replaces traditional mechanical wire formation from metal plates with a conductor formation process that deposits conductive material directly between stacked elements. This substitution eliminates the need for separate wire manufacturing and routing operations, reducing structural complexity while maintaining electrical connectivity and structural integrity through integrated conductor formation.
Solution Approach 2:
The patent merges the interconnection function with the element stacking structure itself. Conductors are formed as part of the stacking process rather than as separate components, integrating the interconnection system into the overall device architecture. This merging reduces the number of discrete parts and simplifies the overall structure while maintaining strength and connectivity.
3Ease of manufacture
If traditional wire-based configuration is used, then established manufacturing processes are maintained, but production cost increases when die modifications are required
Solution Approach 1:
The patent performs conductor formation and element stacking in a predetermined sequence during the manufacturing process. By establishing the three-dimensional structure and conductors upfront through standardized stacking operations, the design allows for function changes without requiring costly die modifications later. The preliminary structuring enables cost-effective adaptation through process parameters rather than physical die changes.
Data Source
AI summary
A semiconductor device is provided. The semiconductor device can be manufactured with a reduced cost. The semiconductor device (1D) includes, a substrate (100D), which includes a main surface (101D) and a recess (108D) depressed from the main surface (101D), and includes a semiconductor material; a wiring layer (200D) in which at least a portion thereof is formed on the substrate (100D); one or more first elements (370D) accommodated in the recess (108D); a sealing resin (400D) covering at least a portion of the one or more first elements (370D) and filled in the recess (108D); and a plurality of columnar conductive portions (230D) penetrating through the sealing resin (400D) in the depth direction of the recess (108D), and respectively connected with the portion of the wiring layer (200D) that is formed at the recess (108D).