Semiconductor Device Height Reduction via 3D Redistribution Layers
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Solution Overview
Problem
Existing semiconductor devices face challenges in reducing height without compromising input/output terminals, necessitating innovative methods to minimize device height while maintaining performance and signal integrity.
Innovation Solution
The semiconductor device employs first and second redistribution parts, which are wider than the semiconductor die, to perform a fan-out operation for input/output signals, replacing traditional thick printed circuit boards and incorporating redistribution layers, conductive wires, and encapsulants to create a compact structure with a short electrical path.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If traditional thick printed circuit boards are used for input/output terminals, then signal transmission is reliable, but device height increases
Solution Approach 1:
The patent transitions from planar signal routing to three-dimensional vertical routing by stacking multiple semiconductor dies with redistribution layers. Signals are routed vertically through conductive vias and wires between stacked dies, enabling compact height while maintaining signal integrity through controlled impedance paths
Solution Approach 2:
Multiple functional layers are nested vertically within the device stack. Redistribution layers, conductive wires, and additional circuit dies are embedded within encapsulants in a nested configuration, allowing signal routing paths to be contained within the vertical structure rather than extending externally
2Volume of moving object
If device height is reduced for compact design, then portability improves, but input/output terminal performance may deteriorate
Solution Approach 1:
The device is segmented into multiple functional dies stacked vertically, each handling specific functions. This segmentation allows the I/O functions to be distributed across multiple layers with dedicated redistribution layers, maintaining terminal performance while reducing overall device volume through vertical integration
Solution Approach 2:
Redistribution layers act as intermediary structures between the semiconductor die and external connections. These intermediate conductive layers provide controlled impedance paths and signal routing capabilities, ensuring that I/O terminal performance is maintained despite the compact stacked architecture
Data Source
AI summary
A semiconductor device entirely having a small height, which performs a fan-out operation for input/output signals and forms a short electrical path is provided. The semiconductor device includes a first semiconductor die having a first surface, a second surface opposed to the first surface, a third surface connecting the first and second surfaces to each other, a first bond pad disposed on the first surface, and a first through electrode passing between the first surface and second surface and electrically connected to the first bond pad. A first redistribution part is disposed under the second surface and includes a first redistribution layer electrically connected to the first through electrode. A second redistribution part is disposed over the first surface and includes a second redistribution layer electrically connected to the first bond pad.