Semiconductor Device Redundancy Address Management
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Solution Overview
Problem
Semiconductor devices face errors due to redundant data being stored in non-volatile storage units, which can lead to operational issues when transferred to storage units, particularly with the use of E-fuse arrays where circuit area limitations and amplifier requirements pose challenges.
Innovation Solution
A semiconductor device design that includes a non-volatile storage unit, an address storage unit for sequentially storing and deleting redundant addresses, and a cell array that replaces normal cells with redundancy cells based on input addresses, using a controller to manage reset and access commands and signals to prevent redundant data storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If data is stored in a non-volatile storage unit and then transferred to a storage unit, then data retention is improved, but redundant data storage errors occur leading to operational reliability deterioration
Solution Approach 1:
The patent applies preliminary action by checking for redundant data in the non-volatile storage unit before transferring data to the storage unit. The controller performs a redundancy check operation that compares addresses in the non-volatile storage unit with addresses in the storage unit, and only transfers data if no redundancy is detected, thereby preventing operational errors while maintaining data retention benefits
Solution Approach 2:
The patent implements feedback through a redundancy check mechanism that provides information about duplicate data storage. The controller receives feedback from comparing addresses between non-volatile storage and storage units, and uses this feedback to control whether data transfer should proceed, thus preventing redundant data storage errors while maintaining reliable data retention
2Ease of manufacture
If E-fuse arrays are used to store repair addresses, then manufacturing flexibility is improved, but circuit area increases due to amplifier requirements
Solution Approach 1:
The patent merges the data storage function with the redundancy check function. The non-volatile storage unit stores both repair addresses and data, and the same storage unit is used for redundancy checking. This merging eliminates the need for separate amplifier circuits that would be required if dedicated E-fuse arrays were used, thereby reducing circuit area while maintaining manufacturing flexibility
Solution Approach 2:
The patent applies universality by making the non-volatile storage unit serve multiple functions: storing repair addresses, storing data, and enabling redundancy checks. This multi-functionality eliminates the need for dedicated E-fuse array structures with their associated amplifiers, reducing circuit area while preserving the manufacturing advantages of E-fuse technology
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively prevents redundant data storage errors by sequentially managing addresses and cells, ensuring accurate data transfer and operation within the semiconductor device, thereby enhancing operational reliability.
Implementation Method 1
When a high voltage against which the transistor T may not withstand is applied to the gate G, a gate oxide of the transistor T is broken and thus the gate G and the drain/source D/S are shorted. As a result, the E-fuse operates as a resistor R.
Data Source
AI summary
An embodiment of the present invention provides a semiconductor, including a non-volatile storage unit suitable for storing one or more first addresses; an address storage unit suitable for storing the first addresses sequentially received from the non-volatile storage unit as second addresses while deleting previously stored second addresses identical to an input address of the first addresses, in a reset operation; and a cell array suitable for replacing one or more normal cells with one or more redundancy cells based on the second addresses in an access operation.