Semiconductor Device Reference Cell Data Line Pre-Charging
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Solution Overview
Problem
Conventional semiconductor devices experience prolonged data read times due to the time-consuming pre-charging of reference cell data lines, which is exacerbated by the heavy load on second current-voltage conversion circuits connected to multiple sense amplifiers.
Innovation Solution
Incorporating a charging circuit that assists in pre-charging the reference cell data line, in addition to the second current-voltage conversion circuit, by comparing the voltage level with a predefined voltage and charging if it is lower, thereby reducing pre-charging time and data read time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the second current-voltage conversion circuit is used to pre-charge the reference cell data line, then the data read operation can be performed, but the pre-charging time becomes excessively long due to heavy load
Solution Approach 1:
The patent combines the pre-charging function with the second current-voltage conversion circuit by adding a charging circuit that operates in parallel. The charging circuit includes a charging transistor that is turned on during the pre-charge phase to provide additional current to the reference cell data line, thereby reducing the pre-charging time while maintaining the data read operation capability.
2Device complexity
If the reference cell data line is pre-charged using only the second current-voltage conversion circuit, then circuit complexity is minimized, but data read time is prolonged
Solution Approach 1:
The patent applies preliminary action by pre-charging the reference cell data line before the actual data read operation. A charging circuit is activated in advance to bring the reference cell data line to the required voltage level, so that when the data read operation commences, the line is already prepared, thereby reducing the overall data read time without significantly increasing circuit complexity.
3Loss of time
If the charging circuit assists in pre-charging the reference cell data line, then pre-charging time is reduced, but device complexity increases
Solution Approach 1:
The charging circuit is designed to operate automatically based on the control signal from the control circuit. The charging transistor is turned on and off in synchronization with the pre-charge phase, eliminating the need for separate complex control mechanisms. This self-service approach reduces pre-charging time while keeping the increase in device complexity minimal.
Data Source
AI summary
The present invention provides a semiconductor memory and a control method therefor, the semiconductor device including a first current-voltage conversion circuit (16) connected to a core cell (12) provided in a nonvolatile memory cell array (10), a second current-voltage conversion circuit (26) connected to a reference cell (22) through a reference cell data line (24), a sense amplifier (18) sensing an output from the first current-voltage conversion circuit and an output from the second current-voltage conversion circuit, a compare circuit (28) comparing a voltage level at the reference cell data line with a predefined voltage level, and a charging circuit (30) charging the reference cell data line, if the voltage level at the reference cell data line is lower than the predefined voltage level during pre-charging the reference cell data line. According to the present invention, the pre-charging period of the reference cell data line can be shortened, and the data read time can be shortened.