Semiconductor Repair Circuit with Host-Controlled Redundancy
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Solution Overview
Problem
Existing semiconductor circuits face challenges in effectively repairing failed memory cells after packaging, as existing repair mechanisms are inadequate for post-packaging repairs.
Innovation Solution
A semiconductor system and method that enables the semiconductor circuit to output remaining repair information and perform repair operations in response to external commands, with a host determining the number of available repairs and controlling the repair process based on this information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a repair circuit is included in the semiconductor circuit, then failed memory cells can be replaced with redundant memory cells, but repair operations cannot be performed after packaging completion
Solution Approach 1:
The patent pre-allocates redundant memory cells and configures repair circuitry before packaging, enabling future repair operations. The repair circuit is prepared in advance with spare cells reserved, so when failures occur after packaging, the system can immediately initiate repair without additional hardware modifications.
Solution Approach 2:
The patent introduces an intermediary repair control mechanism that mediates between the host system and the semiconductor memory. This intermediary layer manages the repair process by coordinating between external repair commands and internal redundant cell activation, enabling post-packaging repair capability without requiring direct physical access to memory cells.
2Ease of repair
If repair operations are enabled after packaging, then failed memory cells can be repaired, but the system lacks information about available repair capacity
Solution Approach 1:
The patent implements a feedback mechanism where the semiconductor circuit continuously monitors and reports the number of remaining available repairs to the host system. After each successful repair operation, the circuit updates its internal counter and communicates the reduced repair capacity back to the host, enabling informed decision-making about subsequent repair attempts.
Solution Approach 2:
The semiconductor circuit autonomously tracks its own repair capacity and manages the state of redundant memory cells. The circuit independently determines how many repairs remain available and maintains this information without requiring external monitoring, allowing the system to self-manage its repair resources efficiently.
Data Source
AI summary
Provided is a semiconductor system and method for repairing the same that may improve repair capacity of the semiconductor system. The semiconductor system comprises a semiconductor circuit configured to output a remaining repair information and perform a repair operation in response to an external command, and a host configured to determine a number of available repairs based on the remaining repair information and provide the semiconductor circuit with the external command based on the number of available repairs.