Semiconductor Repeater Layout for Signal Speed and EMC

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Solution Overview

Problem

The existing signal transmission techniques in semiconductor integrated circuit devices, particularly in cellular phones, face issues with signal degradation and increased chip size due to fragmentation of core power source regions and inefficient layout of repeaters and power switches, which affect electrical characteristics and Electro-Magnetic Compatibility (EMC) performance.

Innovation Solution

A semiconductor integrated circuit device design where a repeater is strategically arranged within a power source region, surrounded by WELL separation, with a repeater power supply switching section controlling power supply based on control signals, and power source regions are laid out with P-WELLS interposed between N-WELLS to reduce layout area and improve EMC resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a repeater is arranged in a power source region on the output side, then signal transmission is enabled between different core power source regions, but the core power source region becomes fragmented and wires become longer, deteriorating electrical characteristics and lowering EM resistance

Engineering Contradiction:
Improvesignal transmission reliabilityVSAvoidEM resistance
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A repeater region is introduced as an intermediary component between different power source regions. This repeater region acts as a mediator that enables signal transmission between core power source regions while being separately supplied with power, thus preventing fragmentation of the core power source regions and maintaining their electrical characteristics and EM resistance.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If power switches are provided to surround core power source regions, then power supply control for each region is achieved, but layout area increases, causing semiconductor chip size to increase

Engineering Contradiction:
Improvepower control flexibilityVSAvoidchip area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The power supply control system is segmented into multiple independent power switching sections, each controlling a specific power source region. This segmentation allows for independent power control of each region while using compact power switch layouts that do not unnecessarily increase the overall chip area.

Inventive Principle:
Principle #1Segmentation

3Loss of energy

If core power source regions are divided for power control, then low power consumption is achieved through selective ON/OFF control, but wire length increases and electrical characteristics deteriorate

Engineering Contradiction:
Improvepower consumptionVSAvoidwire length
Core Design Contradiction:
Loss of energyVSLength of moving object

Solution Approach 1:

Repeater regions serve as intermediary power supply zones that enable selective power control between divided core power source regions. By providing dedicated power supply paths through these repeater regions, the need for excessively long wires is reduced, maintaining electrical characteristics while enabling low power consumption through selective region power control.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS7834381B2Layout of power source regions and power switch regions in a semiconductor integrated circuit device
Publication Date: 2010.11.16 RENESAS ELECTRONICS CORP
  • US7834381B2 patent drawing
  • US7834381B2 patent drawing
  • US7834381B2 patent drawing

AI summary

Repeaters are arranged at arbitrary positions to substantially improve transmission speed of a signal. In the semiconductor integrated circuit device 1, repeater regions 10 where repeaters are provided as relay points for wiring are provided in the central parts of the core power source regions 2, 3 and 5, on the left side of the core power source regions 4 to 8 and at the upper and lower parts of the semiconductor integrated circuit device 1. A power switch region for repeater 11 is formed so as to surround the core power source regions 2 to 8 and the repeater regions 10. The power source lines of the reference potential connected to the repeater regions 10 are laid out at equally spaced intervals throughout the core power source regions 2 to 8, which enables the repeater regions 10 to be flexibly laid out. This permits the repeaters to be more effectively arranged, which improves the performances of semiconductor integrated circuit device 1.