Semiconductor Device Reset Signal Initialization

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Solution Overview

Problem

Semiconductor devices, particularly DRAM, face challenges in maintaining data integrity due to the need for frequent refresh operations to prevent data loss, and they require efficient initialization and power management operations to minimize power consumption and ensure correct active operations.

Innovation Solution

A semiconductor system comprising a first semiconductor device that outputs reset, command/address, and data signals, and a second semiconductor device that generates start and oscillation signals based on the reset signal, enabling initialization operations, refresh signals, and power-down management to ensure data integrity and efficient power usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If DRAM devices operate at high speed with large cell capacitance, then productivity and data storage capacity are improved, but power consumption increases and data loss occurs over time requiring frequent refresh operations

Engineering Contradiction:
Improveoperating speedVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent applies preliminary action by performing initialization operations before active operations to set correct initial conditions. The initialization sequence is executed in advance to ensure memory cells are properly configured before data operations begin, preventing errors and ensuring reliable high-speed operation without requiring excessive power during active use.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements periodic action through refresh operations that periodically rewrite data in DRAM cells to prevent data loss. The system performs initialization operations periodically and uses refresh cycles to maintain data integrity over time, allowing the device to sustain high-speed operation with large cell capacitance while managing power consumption through scheduled maintenance operations.

Inventive Principle:
Principle #19Periodic action

2Reliability

If refresh operations are performed frequently to prevent data loss, then data integrity is improved, but power consumption and operational complexity increase

Engineering Contradiction:
Improvedata integrityVSAvoidoperational complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent reduces operational complexity by performing initialization operations in advance before active data operations. By setting up memory cells with correct initial conditions beforehand, the system simplifies subsequent operations and reduces the complexity of managing refresh cycles during active use, while maintaining data integrity through the preliminary configuration.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If initialization operations are performed to set correct initial conditions, then reliability is improved, but power consumption and operation time increase

Engineering Contradiction:
Improvecorrect active operationsVSAvoidinitialization time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs initialization operations as a preliminary step before active operations begin. By completing the initialization sequence in advance, the system ensures reliable operation with correct initial conditions while minimizing the impact on overall operation time, as the initialization is done once before the main operational phase.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20210350840A1Semiconductor devices
Publication Date: 2021.11.11 SK HYNIX INC
  • US20210350840A1 patent drawing
  • US20210350840A1 patent drawing
  • US20210350840A1 patent drawing

AI summary

A semiconductor system may include a first semiconductor device and a second semiconductor device. The first semiconductor device may be configured to output a reset signal, command/address signals and data. The second semiconductor device may be configured to enable a start signal and an oscillation signal based on the reset signal. The oscillation signal starts to oscillate in response to the reset signal.