Semiconductor Device Ring Dam Power Interconnect Center Voltage Drop
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Solution Overview
Problem
In semiconductor devices with a chip-on-chip (CoC) structure, existing methods face challenges in stabilizing power supply to center sections of chips, leading to voltage drops that affect transistor performance and increase costs due to increased substrate dimensions.
Innovation Solution
The implementation of a semiconductor device with a ring-shaped interconnect on the circuit formation surface of one chip and a re-distribution interconnect extending to the center section of the other chip, which are power or ground interconnects, allows for stable power supply to center sections regardless of chip dimensions, reducing voltage drops and costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If power is supplied to the upper semiconductor chip via the lower semiconductor chip in a CoC structure, then the chip connection is achieved, but a voltage drop occurs due to insufficient power supply voltage
Solution Approach 1:
The patent introduces a novel interconnect structure that extends from the peripheral region through the substrate to the center section, creating a three-dimensional power distribution path. This dimensional extension allows power to reach the center section of the upper chip without passing through the entire lower chip, thereby reducing the voltage drop and improving power supply stability.
2Device complexity
If the lower semiconductor chip is covered with the upper semiconductor chip, then the CoC structure is formed, but power cannot be supplied from above directly to the center section of the lower chip
Solution Approach 1:
The patent segments the power supply path into two distinct regions: a peripheral region for general chip connection and a center section for direct power supply. The interconnect structure is divided into a first portion in the peripheral region and a second portion extending to the center section, allowing independent optimization of power distribution to different areas.
Solution Approach 2:
The patent introduces an intermediary interconnect structure that penetrates through the substrate to bridge the peripheral region and the center section. This intermediary structure acts as a mediator to deliver power directly to the center section of the lower chip, overcoming the obstruction caused by the upper chip coverage.
3Reliability
If chip positions are shifted to supply power from substrate directly to upper chips, then power supply is improved, but the area of the resin substrate increases
Solution Approach 1:
The patent applies local quality by concentrating the power supply interconnect structure specifically at the center section of the substrate and upper chip, rather than shifting all chip positions. This localized approach provides direct power supply to where it is most needed without increasing the overall substrate area.
Data Source
AI summary
A semiconductor device includes: on an upper surface of a second semiconductor chip on a circuit board, a ring dam section formed at an outer circumference of a mounting region above which a first semiconductor chip is mounted; and an interconnect extending from the dam section to a center section of the first semiconductor chip or the second semiconductor chip in a region in which the first semiconductor chip faces the second semiconductor chip. The interconnect is electrically connected to a connection terminal on a circuit formation surface of the first or second semiconductor chip at the center section of the first or second semiconductor chip. The dam section and the interconnect are power supply interconnects or ground interconnects.