Semiconductor Seal Ring Noise Isolation via Guard Ring
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Solution Overview
Problem
Existing semiconductor devices face noise transmission issues between device regions due to the seal ring, leading to malfunction, as conventional methods are insufficient in suppressing noise transmission effectively.
Innovation Solution
A semiconductor device with a blocking region, or guard ring, formed on the semiconductor substrate between the seal ring and device regions, which increases impedance to block noise transmission paths, using a well structure that can form PN junctions or maintain a predetermined potential to reduce noise conduction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the seal ring is electrically connected to the semiconductor substrate, then the seal ring can provide effective moisture protection, but noise is transmitted from the device region through the seal ring to other device regions causing malfunction
Solution Approach 1:
The seal ring is divided into multiple segments with non-conducting parts (gaps) between them, breaking the continuous electrical connection while maintaining the protective barrier function against moisture
Solution Approach 2:
A blocking region (guard ring) composed of a well is introduced as an intermediary structure between the seal ring and the device regions, blocking the noise transmission path through the semiconductor substrate while allowing the seal ring to maintain its protective function
2Object-affected harmful factors
If a nonconducting part is provided in the seal ring to block noise transmission, then noise transmission is suppressed, but the moisture protection effectiveness is reduced
Solution Approach 1:
The blocking region acts as a dedicated noise-blocking intermediary positioned between the seal ring and device regions, allowing the seal ring itself to remain continuous and maintain its moisture protection function while the intermediary blocks the noise transmission path through the substrate
3Object-affected harmful factors
If the blocking region is positioned between the seal ring forming region and the device region, then noise transmission in the in-plane direction is suppressed, but the device complexity increases
Solution Approach 1:
The blocking region is merged with the existing well structure in the semiconductor substrate, utilizing the substrate's natural features rather than adding completely separate components, thereby reducing overall structural complexity while maintaining noise blocking functionality
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Effectively suppresses noise transmission in the in-plane direction of the semiconductor substrate, preventing malfunctions in device regions and enhancing the isolation between them.
Implementation Method 1
the blocking region has a function for suppressing transmission of noise generated in one of the first and second device regions to the other region on a level that produces no practical problem while an absolute value of the impedance Z represented in the equation (1) (herein after, the absolute value of the right side in the equation (1) will be simply referred to as Z or an impedance) is high enough
Implementation Method 2
The blocking region (guard ring) is composed of a well provided on the semiconductor substrate. Due to the guard ring composed such way, noise transmission in an in-plane direction of the semiconductor substrate is suppressed effectively
Data Source
AI summary
A semiconductor device that can suppress noise transmission through a seal ring provided between two device regions. The semiconductor device includes a logic unit and an analog unit. The semiconductor device further includes a silicon substrate, an insulating interlayer, a seal ring surrounding the outer periphery of the logic unit composed of a conductive film buried in the insulating interlayer, a well provided on the silicon substrate, and an N well guard ring that blocks conduction of a path from the logic unit, through the seal ring to the analog unit. The N well guard ring is disposed between the seal ring region 106 and the logic unit or the analog unit.


