Semiconductor Seal Ring Layout for Moisture Blocking and Noise Isolation

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Solution Overview

Problem

Integrated circuits are vulnerable to moisture and ionic contaminants at their periphery due to exposed areas between chips, which can affect operational reliability and lead to microcracking during the sawing process.

Innovation Solution

The implementation of a semiconductor device design featuring a closed-loop outer seal ring and a gapped inner seal ring, where the outer seal ring provides continuous structural reinforcement and protection against moisture and contaminants, while the inner seal ring breaks noise-coupling paths with strategically placed gaps to isolate noise from high-frequency circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If seal rings are added to protect the periphery, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improveoperational reliabilityVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The seal rings serve multiple functions simultaneously: they provide structural reinforcement to the chip edges, act as barriers against moisture and ionic contaminants, and enhance mechanical strength during the sawing process. This multi-functionality allows a single structural element to address multiple reliability concerns without proportionally increasing complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The seal ring structure merges several protective functions into a single integrated component. Rather than adding separate elements for structural support, moisture protection, and contaminant blocking, the metal band combines these functions, reducing the overall complexity that would result from multiple separate protective structures

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If the wafer is sawed into individual chips, then productivity is improved, but microcracking occurs during the process

Engineering Contradiction:
Improvechip separation efficiencyVSAvoidstructural integrity
Core Design Contradiction:
ProductivityVSStrength

Solution Approach 1:

The seal rings are formed on the chip periphery before the wafer sawing process. These metal bands provide预先 reinforcement and structural cushioning to the fragile chip edges, absorbing and distributing mechanical stresses during the sawing operation to prevent microcracking from developing in the active circuitry regions

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS11791285B2Semiconductor device
Publication Date: 2023.10.17 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11791285B2 patent drawing
  • US11791285B2 patent drawing
  • US11791285B2 patent drawing

AI summary

A device includes an outer seal ring, an integrated circuit, and an inner seal ring. The outer seal ring forms a first closed loop. The integrated circuit is surrounded by the outer seal ring. The inner seal ring is between the outer seal ring and the integrated circuit. The inner seal ring forms a second closed loop that defines an enclosed region external to the integrated circuit.