Semiconductor Device With Segmented Gate Insulating Film

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Solution Overview

Problem

Conventional level shifter blocks in display driver ICs occupy large areas due to the use of thick gate insulating films, which limit the achievement of desired drain current and leakage current values, and struggle with adjusting channel length effectively.

Innovation Solution

A semiconductor device with a combination of thin and thick gate insulating films, connected by a varying thickness connecting insulating film, and optimized doping areas to enhance drain current and reduce leakage current, allowing for adjustable channel length and improved performance at low gate input voltages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a thick gate insulating film is used to withstand high drain voltage, then voltage breakdown resistance is improved, but drain current at low gate input voltage deteriorates

Engineering Contradiction:
Improvevoltage breakdown resistanceVSAvoiddrain current
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The gate insulating film is divided into multiple regions with different thicknesses: a first gate insulating film region with greater thickness near the drain for voltage breakdown resistance, and a second gate insulating film region with smaller thickness near the source for higher drain current. This segmentation allows each region to optimize for its specific functional requirement.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different thicknesses of the gate insulating film are applied to different spatial locations along the channel. The thicker region is localized near the drain where high voltage stress occurs, while the thinner region is localized near the source where higher current flow is desired, creating local optimization of electrical properties.

Inventive Principle:
Principle #3Local quality

2Reliability

If a thick gate insulating film is used, then voltage withstand capability is improved, but device area increases

Engineering Contradiction:
Improvevoltage withstand capabilityVSAvoiddevice area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The gate insulating film thickness is segmented along the channel length, with the thicker portion confined to the drain region and the thinner portion in the source region. This reduces the overall area occupied by thick insulating material while maintaining voltage withstand capability where needed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of uniformly increasing thickness across the entire gate insulating film area, the invention varies thickness along the longitudinal dimension of the channel, optimizing voltage protection only in the critical drain region and reducing area consumption in the source region.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Productivity

If doping concentration in drift region is increased to improve drain current, then leakage current control capability deteriorates

Engineering Contradiction:
Improvedrain currentVSAvoidleakage current control
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The gate insulating film thickness is locally optimized: thinner near the source region to enable higher drain current with lower gate voltage, and thicker near the drain region to maintain voltage breakdown resistance and control leakage current. This local differentiation resolves the contradiction between current drive and leakage control.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10727300B2Semiconductor device and manufacturing method thereof
Publication Date: 2020.07.28 MAGNACHIP SEMICON LTD
  • US10727300B2 patent drawing
  • US10727300B2 patent drawing
  • US10727300B2 patent drawing

AI summary

A semiconductor device, includes a first conductive type first doping area, a second conductive type second doping area, a source region, a drain region, a gate insulating film, and a gate electrode. The first conductive type first doping area is formed in a substrate region. The second conductive type second doping area is formed in the substrate to be spaced apart from the first conductive type first doping area. The source region is formed in the first conductive type first doping area. The drain region is formed in the second conductive type second doping area. The gate insulating film is formed between the source region and the drain region. A thickness of a first end of the gate insulating film is different than a thickness of a second end of the gate insulating film. The gate electrode formed on the gate insulating film.