Semiconductor Device With Segmented Resistive Elements
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Solution Overview
Problem
Existing switching power supplies with resistive layers on JFETs face limitations in increasing resistance to reduce power consumption while maintaining stable current flow, as the resistive layer's region is limited, preventing sufficient resistance enhancement and thus insufficient power reduction.
Innovation Solution
A semiconductor device with a spiral-shaped first resistive element on an insulating film and a second resistive element on the outer side of the impurity layer, coupled by wiring, which increases total resistance without straddling the source region, along with a dummy resistor to prevent pinch-off degradation, allowing for reduced power consumption while maintaining JFET characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the resistive layer is arranged to not extend beyond the source region to maintain stable current flow, then the JFET characteristics are preserved, but the resistance of the resistive layer cannot be sufficiently increased and power consumption is not sufficiently reduced
Solution Approach 1:
The resistive layer is divided into multiple separate resistive regions (first, second, third, and fourth resistive regions) arranged around the source region. Each region is independently positioned within the available space, and their resistances are combined in series to achieve the desired total resistance value without any region extending beyond the source region boundaries.
Solution Approach 2:
Instead of extending the resistive layer in a single direction or simple pattern, the invention utilizes multiple dimensions by arranging resistive regions at different positions around the source region (inner side, outer side, opposite sides). This multi-dimensional arrangement maximizes the use of available space while maintaining the constraint of not extending beyond the source region.
2Loss of energy
If the resistive layer is arranged in a spiral shape within the limited region, then the resistance is increased to some extent, but the region limitation still prevents sufficient resistance enhancement for adequate power reduction
Solution Approach 1:
The continuous spiral resistive layer is segmented into multiple discrete resistive regions. Each region can be independently optimized for its position and dimensions, and the series connection of multiple regions achieves higher total resistance without requiring a complex continuous spiral pattern that would extend beyond the source region.
3Use of energy by moving object
If the resistive layer is extended beyond the source region to increase resistance, then power consumption can be reduced, but the characteristics of the JFET are degraded and current flow becomes unstable
Solution Approach 1:
The harmful constraint is extracted and removed by positioning resistive regions on both the inner side and outer side of the source region. This allows the resistive layer to effectively extend beyond the traditional limited region while maintaining stability through symmetric arrangement, thereby extracting the limitation and converting it into a design freedom.
Solution Approach 2:
The invention employs asymmetric positioning of resistive regions relative to the source region, with some regions on the inner side and others on the outer side. This asymmetric yet balanced arrangement allows the resistive layer to achieve higher resistance values while maintaining electrical stability through careful positioning rather than symmetric extension.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The configuration effectively increases total resistance and reduces power consumption while stabilizing current flow and preventing pinch-off degradation, achieving better power management in switching power supplies.
Implementation Method 1
a first resistive element 240 that is spiral-shaped and is provided on the insulating film 230; a second resistive element 250 that is provided on an outer side of the first impurity layer 210
Implementation Method 2
an insulating film 230 that covers at least the first impurity layer 210
Implementation Method 3
a first resistive element 240 that is spiral-shaped and is provided on the insulating film 230
Data Source
AI summary
This semiconductor device includes: a semiconductor substrate of a first conductive type; a first impurity layer of a second conductive type that is formed on a surface of the semiconductor substrate; a second impurity layer of the first conductive type that is formed to surround the first impurity layer on the surface of the semiconductor substrate; an insulating film that covers at least the first impurity layer; a first resistive element that is spiral-shaped and is provided on the insulating film; a second resistive element that is provided on an outer side of the first impurity layer in a planar view of the semiconductor substrate; and a first wiring that couples an end portion of the first resistive element on an outer peripheral side thereof and the second resistive element to each other.