Semiconductor Memory Selective Element Vertical Bipolar Transistor
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Solution Overview
Problem
Conventional semiconductor devices with selective elements, such as those used in DRAM and PC-RAM, face challenges in reducing the length of selective elements in the bit line direction, leading to increased area allocation and reduced current values due to the lateral configuration of diffusion regions and word lines.
Innovation Solution
The semiconductor device incorporates a configuration where the second and third diffusion regions are arranged in a normal direction to the semiconductor substrate, forming a bipolar transistor with the substrate, allowing for a reduced length of the selective element in the bit line direction by using a P-type semiconductor substrate instead of a dielectric between word lines, thereby reducing capacitance coupling and noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the first N-type diffusion region, word lines, second N-type diffusion region, and P-type diffusion region are arranged in a bit line direction, then the selective element can be formed with conventional lateral configuration, but the length in lateral direction becomes large requiring 4F minimum feature size
Solution Approach 1:
The patent transitions from a conventional lateral arrangement (all regions in the bit line direction) to a vertical arrangement where the second N-type diffusion region and P-type diffusion region are stacked in the vertical direction. This dimensional change reduces the lateral length from 4F to 3F, solving the contradiction between ease of manufacture and length reduction.
2Area of stationary object
If the allocated area becomes smaller for selective elements due to downscaling, then device integration increases, but the current value flowing to the selective element becomes small
Solution Approach 1:
The patent changes the physical parameters of the selective element by introducing a vertical structure with a P-type diffusion region extending from the surface toward the second N-type diffusion region. This structural parameter change enables higher current density in a smaller area, resolving the contradiction between reduced area and maintained current value.
Data Source
AI summary
A semiconductor device includes a semiconductor substrate of a first conductivity type, a first insulating film region that is embedded in a trench formed on the semiconductor substrate, a gate electrode that covers a lower surface of the first insulating film region, and a gate insulating film that is provided between the gate electrode and the semiconductor substrate. The semiconductor device further includes a first diffusion region that covers a first side surface of the first insulating film region, a second diffusion region that covers a second side surface of the first insulating film region, and a third diffusion region that covers an upper surface of the second diffusion region. A selective element includes a field-effect transistor that is constituted by the gate electrode, the first diffusion region, and the second diffusion region, and a bipolar transistor that is constituted by the substrate and the second and third diffusion regions.