Self-Aligned Via Structures in Semiconductor Devices
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Solution Overview
Problem
The challenge in the semiconductor industry is to form reliable semiconductor devices at increasingly smaller sizes due to the complexity and difficulty of fabrication processes as feature sizes decrease, which requires innovative methods to maintain manufacturing efficiency and reduce costs.
Innovation Solution
A semiconductor device structure is formed using a process involving a semiconductor substrate, dielectric layers, conductive lines, and conductive pillars, where anodic oxidation processes and selective deposition techniques are used to create self-aligned via structures, preventing short circuits and reducing the need for high-grade mask layers, thus simplifying the manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If feature sizes continue to decrease to increase functional density, then production efficiency and cost are improved, but fabrication process difficulty and reliability increase
Solution Approach 1:
The conductive structure forms self-aligned vias through selective deposition, where the conductive material automatically aligns with the trench openings without requiring additional alignment steps or high-grade mask layers. This self-alignment mechanism eliminates complex photolithography alignment processes, thereby simplifying fabrication while maintaining precision at smaller feature sizes.
Solution Approach 2:
The patent replaces traditional mechanical alignment systems (photolithography mask alignment) with a field-based approach using selective electrical deposition. The conductive material is deposited selectively in trenches through electrical field control, substituting mechanical mask alignment with an electrical field-guided deposition process that is more suitable for sub-micron features.
2Productivity
If feature sizes continue to decrease to increase functional density, then production efficiency and cost are improved, but device reliability deteriorates
Solution Approach 1:
The self-aligned via formation ensures precise alignment between conductive layers without relying on external alignment tools that may introduce errors at small scales. The conductive material automatically positions itself within the trench boundaries through selective deposition, ensuring consistent alignment and reducing the risk of short circuits or open connections that would compromise device reliability.
Solution Approach 2:
The patent applies preliminary protective measures by forming a conductive barrier layer within the trenches before filling with conductive material. This barrier layer prevents unwanted lateral growth and ensures that the conductive fill remains confined within the trench, preventing short circuits between adjacent conductive lines and enhancing device reliability at smaller feature sizes.
3Ease of manufacture
If traditional alignment methods are used, then manufacturing process is simpler, but short circuits occur and yield decreases
Solution Approach 1:
The selective deposition process allows the conductive material to self-align with the trench openings through electrical field control during deposition. This eliminates the need for complex photolithography alignment steps while ensuring precise positioning, thereby maintaining manufacturing simplicity through automation while achieving high alignment accuracy that prevents short circuits and improves yield.
Solution Approach 2:
The patent replaces mechanical photolithography alignment with an electrical field-based selective deposition process. The conductive material is deposited only in regions where the electrical field is applied (within the trenches), automatically achieving alignment without mechanical masks. This substitution maintains process simplicity through automation while eliminating alignment errors that cause short circuits and reduce yield.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of reliable semiconductor devices with improved yield and reduced manufacturing difficulty and cost by ensuring precise alignment and preventing short circuits, allowing for the production of semiconductor devices with high aspect ratio features.
Implementation Method 1
performing a first anodic oxidation process and a second anodic oxidation process on a metal layer
Implementation Method 2
performing a selective deposition process in the through-holes to form conductive pillars
Data Source
AI summary
A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate. The semiconductor device structure includes a first dielectric layer over the semiconductor substrate. The semiconductor device structure includes a first conductive line embedded in the first dielectric layer. The semiconductor device structure includes a second dielectric layer over the first dielectric layer and the first conductive line. The semiconductor device structure includes a second conductive line over the second dielectric layer. The second dielectric layer is between the first conductive line and the second conductive line. The semiconductor device structure includes conductive pillars passing through the second dielectric layer to electrically connect the first conductive line to the second conductive line. The conductive pillars are spaced apart from each other.