Semiconductor Self-Correction Circuit for Address Training Skew
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Solution Overview
Problem
In high-speed semiconductor devices, the address training operation experiences skew between output data pins due to timing differences, leading to increased operation time and performance deterioration.
Innovation Solution
A semiconductor device with a self-correction circuit that adjusts the delay time and skew of address training data through a combination of data output circuits, address training drivers, and delay blocks, utilizing signal lines with nodes outputting delay values to synchronize data output across multiple pins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If address training data is outputted to remote output pins, then the address training operation can be performed, but skew occurs between pins increasing the operation time
Solution Approach 1:
The patent applies preliminary action by introducing a delay compensation circuit that pre-calculates and applies delay values to each data line before the address training operation begins. The circuit stores delay information for each output pin and uses this information to compensate for skew in advance, ensuring simultaneous data output without requiring time-consuming real-time adjustments during the training operation.
Solution Approach 2:
The patent implements local quality by providing individual delay compensation for each data line leading to each output pin. Instead of a uniform correction approach, the delay compensation circuit separately calculates and applies delay values tailored to each specific data line's characteristics, allowing each pin to receive properly timed data despite varying path lengths and propagation delays.
2Manufacturing precision
If output timing is changed according to output pins, then data can be synchronized, but the time required for address training operation increases
Solution Approach 1:
The delay compensation circuit performs preliminary timing adjustment by storing delay values for each data line and applying them in advance of the address training operation. This eliminates the need for real-time timing adjustments during training, as the synchronization has already been pre-configured through the delay compensation circuit's advance preparation of timing corrections.
Solution Approach 2:
The system implements self-service by having the delay compensation circuit automatically adjust timing based on pre-stored delay information without requiring external intervention or manual timing adjustments. The circuit autonomously compensates for skew by using its internally stored delay values, reducing the operational time needed for synchronization during the training sequence.
Data Source
AI summary
A semiconductor device includes a plurality of data output circuits suitable for outputting data; an address training driver suitable for generating a plurality of address training data and a control signal; a plurality of data lines suitable for transferring the address training data to the data output circuits; and a self-correction circuit suitable for correcting a delay time of the address training data that reaches the data output circuits from the address training driver through the plurality of data lines, and correcting skew of the data that is outputted from the data output circuits.