Sub-lithographic Semiconductor Structure Separation
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Solution Overview
Problem
Current semiconductor device manufacturing processes struggle to isolate structures within sub-lithographic dimensions due to limitations in photo lithography techniques, which restrict precise spacing and feature size definition.
Innovation Solution
The method involves forming sacrificial spacers adjacent to the sidewalls of semiconductor structures, using selective etching and oxidation to create openings that allow for the separation of structures with sub-lithographic precision, enabling the formation of multiple channel regions under a shared gate structure, thereby reducing short channel effects and achieving sub-lithographic separation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If photo lithography techniques are used to isolate structures, then manufacturing process is simple, but manufacturing precision deteriorates due to sub-lithographic dimension limitations
Solution Approach 1:
The isolation process is segmented into multiple distinct steps: forming sacrificial material, depositing spacer material, pattern transfer, and selective removal. This segmentation allows each step to be optimized independently, achieving sub-lithographic precision through the cumulative effect of multiple controlled processes rather than relying on a single photolithography step.
Solution Approach 2:
Sacrificial material is formed in advance at the desired sub-lithographic dimensions before the actual isolation structure is created. This preliminary action establishes the precise spacing pattern that guides subsequent spacer formation and material deposition, enabling precision that would be unattainable through direct photolithography patterning alone.
2Manufacturing precision
If feature size is reduced to sub-lithographic dimensions, then device density increases, but overlay accuracy deteriorates
Solution Approach 1:
The sacrificial material serves as an intermediary that defines the sub-lithographic spacing pattern without requiring direct photolithographic patterning at that scale. The spacer material then acts as a second intermediary that transfers this pattern to the final isolation structure. This two-stage intermediary approach decouples the spacing definition from the final structure formation, eliminating overlay errors that would occur in direct single-step lithography.
Solution Approach 2:
The patent replaces the photolithographic mechanical patterning system with a self-aligned deposition and etch system. Instead of relying on photolithography to directly pattern the isolation structures at sub-lithographic dimensions, the process uses conformal film deposition followed by anisotropic etching, where the spacer thickness (controlled by deposition) directly determines the final feature dimensions, achieving precision independent of photolithographic resolution limits.
3Reliability
If structures are separated at sub-lithographic dimensions, then device performance improves, but process complexity increases
Solution Approach 1:
The spacer deposition process serves multiple functions simultaneously: it defines the isolation spacing, protects underlying structures during etching, and creates the precise dimensional control for sub-lithographic features. This multi-functionality consolidates what would otherwise require separate process steps, achieving sub-lithographic separation without proportionally increasing overall process complexity.
Solution Approach 2:
The patent changes the controlling parameter for feature dimensions from photolithographic wavelength and focus to thin film deposition thickness. By controlling spacer material thickness through atomic layer deposition or chemical vapor deposition, the process achieves sub-lithographic precision where the critical dimension is determined by film thickness (nanometer-scale control) rather than optical resolution, enabling better device performance despite additional process steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the physical separation of semiconductor structures with sub-lithographic precision, reducing short channel effects and allowing for more precise control over gate control, leading to improved performance and reliability in semiconductor devices.
Implementation Method 1
The first material is etch selective with respect to the second material
Implementation Method 2
forming a second material over a second top portion of the second portion of the structure... grown material
Data Source
AI summary
Removing a portion of a structure in a semiconductor device to separate the structure. The structure has two portions of different heights. In one example, the structure is removed by forming a spacer over the lower portion adjacent to the sidewall of the higher portion. A second material is then formed on the structure outside of the spacer. The spacer is removed and the portion under the spacer is then removed to separate the structure at that location. In one embodiment, separate channel regions are implemented in the separated structures. In other embodiments, separate gate structures are implemented in the separated structures.