Semiconductor Die Shielding via Tapered Conductive Vias
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Solution Overview
Problem
Semiconductor devices face challenges in shielding against electromagnetic interference (EMI), radio frequency interference (RFI), and other inter-device interference, which can disrupt the operation of adjacent circuit elements, and existing solutions like metal enclosures increase package size and manufacturing costs.
Innovation Solution
A semiconductor device with a conductive material having a tapered surface and a shielding layer formed conformally over an insulating material in the peripheral region to isolate semiconductor die from inter-device interference, reducing the need for bulky shielding cages and minimizing manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If metal enclosures (Faraday cage) are used to shield semiconductor devices from EMI and RFI, then shielding effectiveness is improved, but package size increases and manufacturing cost increases
Solution Approach 1:
The shielding function is segmented from a separate metal enclosure and integrated directly into the semiconductor device structure through conductive layers and shielding patterns formed during manufacturing. This eliminates the need for external Faraday cages while maintaining shielding effectiveness.
Solution Approach 2:
The shielding function is merged with the device structure itself by forming conductive shielding layers and patterns as integral parts of the semiconductor device. This combines the functional elements (shielding) with the structural elements, eliminating separate shielding components and reducing overall package size.
2Object-affected harmful factors
If metal enclosures (Faraday cage) are used to shield semiconductor devices from EMI and RFI, then shielding effectiveness is improved, but manufacturing cost and complexity increase
Solution Approach 1:
The shielding function is merged with the device structure itself by forming conductive shielding layers and patterns as integral parts of the semiconductor device. This combines the functional elements (shielding) with the structural elements, eliminating separate shielding components and reducing overall package size.
Solution Approach 2:
The semiconductor device structure itself provides the shielding function through its own conductive layers and patterns, rather than requiring separate shielding components. The device serves its own shielding needs through integrated design elements that are formed during the manufacturing process.
3Adaptability or versatility
If through hole vias are drilled in the active area of the die to vertically stack semiconductor die, then device integration is improved, but damage to the wafer and/or die occurs
Solution Approach 1:
The via holes are strategically positioned in the saw streets (non-active areas) rather than the active device areas, creating local differentiation in the structure. This allows vias to be formed where they are needed for stacking while preserving the integrity of the active circuit regions.
Solution Approach 2:
The saw streets serve as intermediary regions that facilitate the stacking function without interfering with the active devices. By placing vias in these intermediate zones, the patent enables vertical integration while protecting the primary functional areas from damage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively isolates semiconductor die from EMI and RFI, improving circuit performance while maintaining a compact package size and reducing manufacturing complexity and costs.
Implementation Method 1
A shielding layer is formed conformally over the insulating material and along the peripheral region to contact the tapered surface of the conductive material and isolate the first and second semiconductor die with respect to inter-device interference
Data Source
AI summary
A plurality of stacked semiconductor wafers each contain a plurality of semiconductor die. The semiconductor die each have a conductive via formed through the die. A gap is created between the semiconductor die. A conductive material is deposited in a bottom portion of the gap. An insulating material is deposited in the gap and over the semiconductor die. A portion of the insulating material in the gap is removed to form a recess between each semiconductor die extending to the conductive material. A shielding layer is formed over the insulating material and in the recess to contact the conductive material. The shielding layer isolates the semiconductor die from inter-device interference. A substrate is formed as a build-up structure on the semiconductor die adjacent to the conductive material. The conductive material electrically connects to a ground point in the substrate. The gap is singulating to separate the semiconductor die.