Semiconductor Source Lines in X and Y Directions
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Solution Overview
Problem
Trench gate technology faces challenges in reducing the width of the embedded gate for lower voltage configurations, which affects the breakdown voltage characteristics in semiconductor devices.
Innovation Solution
A semiconductor device design with source lines in both X and Y directions, featuring a protruding gate layer with an isolation layer between the source and gate layers, and a buried isolation layer in trenches, allowing for user-defined distance between source lines and optimized electrical characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If trench gate technology is used to improve breakdown voltage characteristics, then breakdown voltage is improved, but gate width must be reduced for lower voltage configurations which complicates the device structure
Solution Approach 1:
The patent transitions from conventional planar gate structures to a three-dimensional protruding gate structure that extends vertically from the substrate surface. This dimensional change allows the gate to achieve effective control over the channel while maintaining a simplified structural implementation, resolving the contradiction between achieving high breakdown voltage characteristics and avoiding complex gate width reduction requirements.
Solution Approach 2:
The device is segmented into distinct functional regions including protruding gates, source regions, drain regions, and isolation layers. This segmentation allows each component to be independently optimized - the protruding gates provide enhanced electric field control for high breakdown voltage, while the isolated structures prevent unwanted interactions, thereby achieving reliable high-voltage characteristics without requiring complex gate width adjustments.
2Reliability
If source lines are arranged in both X and Y directions, then electrical characteristics are optimized, but manufacturing precision requirements increase
Solution Approach 1:
The manufacturing process employs self-aligned fabrication techniques where subsequent layers are automatically positioned relative to previous layers through the same lithographic and etching steps. This self-service approach ensures that source lines in both X and Y directions are precisely spaced without requiring additional alignment operations, thereby achieving optimized electrical characteristics while maintaining standard manufacturing precision levels.
3Reliability
If isolation layers are added between source and gate layers, then electrical performance is improved, but device complexity increases
Solution Approach 1:
The isolation layers serve multiple functions simultaneously: they electrically isolate adjacent structures to prevent unwanted current paths, provide mechanical support for the protruding gates, and define the geometric boundaries of active regions. This multi-functionality allows the device to achieve improved electrical performance without proportionally increasing structural complexity, as the same isolation elements fulfill multiple roles in the device architecture.
Data Source
AI summary
A device is disclosed. The device includes a semiconductor substrate, a plurality of source lines formed on a surface of the semiconductor substrate. The plurality of source lines are laid in both X and Y directions. The device further includes a plurality of gate lines laid out over source lines in X direction in the plurality of source lines, a source contact line that connects source lines in the plurality of source lines that are terminating in Y direction, a gate contact line that connects the plurality of gate lines and a drain contact.