Semiconductor Module Spacer Structure for Stress and Discharge Control
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Solution Overview
Problem
Existing semiconductor devices face challenges in effectively connecting and encapsulating semiconductor chips and circuit boards while maintaining thermal conductivity and electrical insulation, leading to potential electrical discharge and stress concentration at corners.
Innovation Solution
A semiconductor device design that includes a conductive spacer between the conductive circuit pattern layer and wiring pattern layer, connected via solder, and encapsulated with a member that exposes the spacer's upper bonding surface, ensuring electrical connection and thermal conductivity while preventing discharge.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If semiconductor chips and circuit boards are connected using conventional bonding methods, then electrical connection is achieved, but stress concentration occurs at corners and electrical discharge may occur
Solution Approach 1:
A conductive spacer is introduced as an intermediary component between the circuit board and wiring board. This spacer has rounded corners that eliminate stress concentration points and provide a controlled conductive path, preventing electrical discharge while maintaining electrical connection reliability.
Solution Approach 2:
The conductive spacer features localized rounded corners at specific positions where stress concentration would occur. This local geometric modification distributes stress evenly and prevents electrical discharge at critical interfaces without affecting the overall connection structure.
2Reliability
If conventional encapsulation methods are used, then component protection is achieved, but thermal conductivity is reduced and electrical insulation may be compromised
Solution Approach 1:
The encapsulating member is constructed as a composite structure with a heat-conductive base layer for thermal management and an insulating coating layer for electrical protection. This multi-layer composite material simultaneously achieves component protection while maintaining thermal conductivity and providing electrical insulation.
Solution Approach 2:
The encapsulation structure is segmented into functional layers: a heat-conductive base layer for thermal management and an insulating coating layer for electrical protection. This segmentation allows each layer to optimize its specific function without compromising the other.
3Reliability
If direct bonding between circuit boards is performed, then electrical connection is established, but stress concentration at corners leads to potential failure
Solution Approach 1:
The conductive spacer acts as a mediator between directly bonded circuit boards, replacing corner-to-corner direct contact with a distributed bonding surface. The rounded geometry of the spacer eliminates stress concentration points while maintaining electrical connectivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design enhances thermal conductivity and electrical insulation, reduces stress concentration, and prevents electrical discharge, improving the reliability and performance of semiconductor modules.
Implementation Method 1
enhances thermal conductivity
Implementation Method 2
enhances electrical insulation, prevents electrical discharge
Implementation Method 3
connected via solder
Data Source
AI summary
A semiconductor device, including: a semiconductor chip including an upper surface electrode and a lower surface electrode; an insulated circuit board having on an upper surface thereof a conductive circuit pattern layer, on which the lower surface electrode is disposed; a wiring board having on a lower surface thereof a wiring pattern layer, which faces the upper surface of the insulated circuit board, and is electrically connected to the upper surface electrode; a conductive spacer disposed between the conductive circuit pattern layer and the wiring pattern layer, and having: a lower bonding surface and an upper bonding surface respectively bonded to the conductive circuit pattern layer and the wiring pattern layer; and an encapsulating member encapsulating the semiconductor chip, the insulated circuit board, the wiring board and the conductive spacer while exposing the upper bonding surface of the conductive spacer and a lower surface of the insulated circuit board.


