Semiconductor Spacer Patterning for Sub-28 Nm Line Spacing
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Solution Overview
Problem
Current semiconductor manufacturing techniques face challenges in achieving precise patterning of lines at sub-28 nm technology nodes due to misalignment and overlay errors, which limits the miniaturization of integrated circuits.
Innovation Solution
The implementation of self-aligned double patterning (SADP) technology, where mandrels are patterned and spacers are formed along their sidewalls, allowing for the definition of patterns at half the mandrel pitch, combined with directional etching operations to trim and shape the spacers, reducing the need for additional lithographic processes and simplifying the manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional lithography is used for patterning at sub-28 nm nodes, then the manufacturing process is simpler, but misalignment and overlay errors occur reducing manufacturing precision
Solution Approach 1:
The patterning process is divided into multiple discrete steps: forming mandrels at a first pitch, depositing spacer material around mandrels, selectively removing mandrels, and performing directional etching. This segmentation allows each step to be optimized independently, achieving sub-28 nm precision without conventional lithography limitations
Solution Approach 2:
Mandrels are formed in advance as sacrificial structures that define the positions of subsequent features. The spacer material is deposited conformally on mandrels before mandrel removal, ensuring precise spacing is established prior to final pattern formation. This preliminary structuring enables accurate line spacing without direct lithographic patterning at the final pitch
2Manufacturing precision
If self-aligned double patterning with multiple steps is implemented, then manufacturing precision improves, but the manufacturing process becomes more complex
Solution Approach 1:
The spacer structures self-align to mandrels through conformal deposition, automatically establishing precise spacing without requiring additional alignment steps. The directional etching process self-selects which spacer portions to remove based on geometry, eliminating the need for complex photomask alignment and reducing process complexity despite multiple manufacturing steps
Solution Approach 2:
The process transitions from lithographic parameter control (wavelength, numerical aperture) to deposition and etching parameter control (film thickness, etch selectivity, incident angle). This parameter transformation enables precise patterning by leveraging the superior resolution of thin-film deposition and directional etching compared to optical lithography at sub-28 nm nodes
3Manufacturing precision
If photomask and lithography operations are used, then patterning can be achieved, but manufacturing costs increase and process time extends
Solution Approach 1:
The patent extracts and eliminates photomasks and lithography operations from the patterning process, replacing them with purely deposition and etching-based self-aligned double patterning. This extraction removes the time-consuming steps of photomask fabrication, alignment, and lithographic exposure while maintaining sub-28 nm pattern definition accuracy through spacer-based self-alignment
Solution Approach 2:
Optical lithography (electromagnetic field-based) is replaced with physical vapor deposition and directional plasma etching (mechanical/physical processes). The deposition process physically deposits material conformally on mandrel surfaces, and directional etching uses ion bombardment at controlled angles to selectively remove material, both providing superior resolution and faster processing compared to optical methods at sub-28 nm nodes
Data Source
AI summary
The present disclosure provides a method of manufacturing a semiconductor structure. The method includes providing a substrate; depositing a mask layer over the substrate; forming a mandrel pattern over the mask layer; forming a spacer pattern around the mandrel pattern; removing the mandrel pattern; and applying at least one directional etching operation along a first direction to etch two opposing ends of the spacer pattern and form a first spacer feature and a second spacer feature apart from each other.