Semiconductor Package Spacer Void Prevention
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Solution Overview
Problem
Miniaturization of semiconductor device packages reduces the space between the logic die and the upper substrate/interposer, making it challenging to form an encapsulant that completely encapsulates the logic die, leading to voids and reliability issues.
Innovation Solution
A semiconductor device package design that includes an adhesive layer between the electrical component and the upper substrate, with a spacer directly contacting both the adhesive layer and the substrate, and an encapsulation layer between the substrates, using thermosetting resin for the adhesive layer and epoxy resin or other insulating materials for the spacer, to maintain a fixed separation and prevent voids.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the space between the logic die and the upper substrate is reduced for miniaturization, then the package size is reduced, but the encapsulant cannot completely encapsulate the logic die resulting in voids
Solution Approach 1:
The patent changes the physical parameters of the encapsulant material by using a two-stage curing process. The first stage uses a low-viscosity resin that can flow into and fill the reduced space between the logic die and upper substrate. The second stage uses a high-viscosity resin that provides structural support. This parameter change in material viscosity through staged curing allows complete encapsulation in miniaturized packages without voids.
Solution Approach 2:
The patent applies preliminary action by first forming a low-viscosity adhesive layer before mounting the upper substrate. This low-viscosity layer is applied in advance to ensure complete wetting and filling of the space between components. The subsequent high-viscosity encapsulant is then applied to complete the encapsulation, ensuring no voids remain in the miniaturized structure.
2Reliability
If a spacer is added to maintain separation between components, then voids are prevented, but the device complexity increases
Solution Approach 1:
The patent applies multi-functionality by making the adhesive layer serve multiple purposes: it acts as both the bonding adhesive between the logic die and upper substrate, and simultaneously serves as the encapsulant material that fills and protects the space between components. This eliminates the need for separate spacer components while maintaining complete encapsulation and preventing voids in miniaturized packages.
Data Source
AI summary
At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package includes a first substrate, an electrical component disposed on the first substrate, a second substrate disposed over the electrical component, an adhesive layer, a spacer, and an encapsulation layer. The adhesive layer is disposed between the electrical component and the second substrate. The spacer directly contacts both the adhesive layer and the second substrate. The encapsulation layer is disposed between the first substrate and the second substrate.