Semiconductor Spacer and Back-Side Contacts for S/D Separation
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Solution Overview
Problem
The semiconductor industry faces challenges in preventing epitaxial source/drain regions on adjacent fin structures from merging during fabrication and forming electrical connections between these regions and power rails in scaled-down devices, which increases complexity and costs.
Innovation Solution
The use of dielectric S/D spacers along the sidewalls of fin structures to control epitaxial lateral growth of source/drain regions and the implementation of back-side contact structures and power rails to reduce device area and interconnects, thereby preventing region merging and improving connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If conventional fabrication processes are used for scaled-down devices, then device dimensions are reduced, but epitaxial source/drain regions on adjacent fin structures merge during fabrication
Solution Approach 1:
A dielectric spacer layer is introduced as an intermediary structure between adjacent fin structures. This spacer layer physically separates the epitaxial source/drain regions during growth, preventing them from merging while allowing the device dimensions to be scaled down. The spacer acts as a mediator that maintains manufacturing precision despite reduced device dimensions.
Solution Approach 2:
The dielectric spacer layer is formed on the fin structures before the epitaxial growth of source/drain regions. This preliminary action establishes the separation boundaries in advance, ensuring that when the epitaxial regions grow, they remain separated by the pre-positioned spacer, thus preventing merging.
2Reliability
If conventional front-side contact structures are used, then electrical connections are formed, but device area and interconnect dimensions increase
Solution Approach 1:
The contact structures are moved from the front surface to the back surface of the device. This dimensional change allows electrical connections to be formed through the substrate rather than on the surface, reducing the device area occupied by contacts and interconnects while maintaining electrical connectivity.
Solution Approach 2:
Instead of forming contact structures on the front side of the device as conventional, the patent inverts the approach by forming contact structures on the back side. This inversion reduces the footprint of contact structures on the active device area while achieving the same electrical connection function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively limits epitaxial growth, prevents region merging, reduces processing steps and costs, and enhances device performance by minimizing power consumption and contact structure dimensions.
Implementation Method 1
control epitaxial lateral growth of source/drain regions
Data Source
AI summary
A semiconductor device with back-side contact structures and a method of fabricating the same are disclosed. The semiconductor device includes first and second S/D regions, a stack of nanostructured semiconductor layers disposed adjacent to the first S/D region, a gate structure surrounding each of the nanostructured semiconductor layers, a first pair of spacers disposed on opposite sidewalls of the first S/D region, a second pair of spacers disposed on opposite sidewalls of the second S/D region, a third pair of spacers disposed on opposite sidewalls of the gate structure, a first contact structure disposed on a first surface of the first S/D region, and a second contact structure disposed on a second surface of the first S/D region. The first and second surfaces are opposite to each other. The first pair of spacers are disposed on opposite sidewalls of the second contact structure.