Semiconductor Stack Structure with Impurity Layer for Resistance Control

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Solution Overview

Problem

Existing semiconductor device fabrication methods face challenges in maintaining reliable resistance switching characteristics due to the increase in electrical resistance of metal oxide layers during oxidation, which affects device performance and productivity.

Innovation Solution

Doping an impurity into the metal oxide layer before oxidation to form a doped metal oxide layer, which helps maintain a lower resistance state and improve switching characteristics, thereby preventing the increase in electrical resistance during the fabrication process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a metal oxide layer is formed during the fabrication process, then the layer provides insulating properties, but the electrical resistance of the metal oxide layer increases

Engineering Contradiction:
Improveresistance switching characteristicsVSAvoidelectrical resistance control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

An impurity layer is formed in advance before the metal oxide layer is deposited. This preliminary action ensures that when the metal oxide layer is subsequently formed and oxidized, the impurity is already in position to prevent resistance increase, thereby maintaining reliable resistance switching characteristics throughout the fabrication process.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

An impurity layer is introduced as an intermediary between the conductive layer and the metal oxide layer. This intermediary layer prevents the harmful oxidation effect on the metal oxide layer's electrical resistance, allowing the metal oxide to maintain its insulating properties while avoiding excessive resistance increase.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If the metal oxide layer is oxidized during fabrication, then the insulating properties are enhanced, but the electrical resistance increases affecting device performance

Engineering Contradiction:
Improvefabrication processVSAvoiddevice performance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The oxidation process, which normally causes harmful resistance increase in the metal oxide layer, is converted into a beneficial process. By having an impurity layer in place, the oxidation can proceed to enhance insulating properties while the impurity simultaneously prevents the harmful resistance increase, turning a potentially harmful effect into a beneficial one.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Reliability

If resistance switching characteristics are improved, then device reliability increases, but additional fabrication steps are required

Engineering Contradiction:
Improveresistance switching characteristicsVSAvoidfabrication process
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The formation of the impurity layer is merged with the existing fabrication sequence, where the impurity layer is formed as part of the standard fabrication process before metal oxide deposition. This integration allows resistance switching characteristics to be improved without requiring completely separate or additional major fabrication steps.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The approach enhances resistance switching characteristics, improves reliability, and increases productivity by maintaining a lower resistance state and preventing resistance increases in metal oxide layers during oxidation.

Implementation Method 1

diffusing impurities from the impurity layer into the non-stoichiometric material layer

Methodology Applied
Scientific EffectDiffusion: Diffusion

Data Source

PatentUS9035274B2Semiconductor device having a stack structure including a stoichiometric material and a non-stoichiometric material, and method for fabricating the same
Publication Date: 2015.05.19 SK HYNIX INC
  • US9035274B2 patent drawing
  • US9035274B2 patent drawing
  • US9035274B2 patent drawing

AI summary

A method for fabricating a semiconductor device includes forming an impurity layer over a first conductive layer; forming a first metal oxide layer over the impurity layer, wherein the first metal oxide layer includes oxygen at a lower ratio than a stoichiometric ratio; diffusing an impurity from the impurity layer into the first metal oxide layer to form a first doped metal oxide layer; forming a second metal oxide layer over the first doped metal oxide layer; and forming a second conductive layer over the second metal oxide layer.