3D Semiconductor Stack Sidewall Protection for Implant Damage
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Solution Overview
Problem
Current semiconductor memory devices face challenges in reducing damage from high-energy implantation processes and achieving lower manufacturing costs while maintaining high element density and storage capacity, particularly in three-dimensional memory structures.
Innovation Solution
A semiconductor structure comprising a substrate with a stacked conductive and insulating structure, where a conductive layer surrounds the sidewalls and top portion of the stack, reducing exposure and potential damage during implantation, and allowing for reduced dimensions and costs in memory array manufacturing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If high energy is applied in the implantation process to achieve high element density, then storage capacity is improved, but damage to devices increases
Solution Approach 1:
The memory structure is divided into multiple stacked layers with conductive structures and insulating structures arranged in alternating fashion. This segmentation allows the implantation process to be distributed across multiple layers rather than concentrating high energy in a single layer, thereby achieving high element density while reducing damage to any individual device component.
Solution Approach 2:
The patent transitions from a planar two-dimensional memory structure to a three-dimensional stacked structure. By stacking multiple conductive and insulating layers vertically, the memory achieves higher element density in the vertical dimension while the implantation energy is distributed across multiple layers, reducing the harmful effects on any single layer.
2Quantity of substance
If three-dimensional stacked structure is implemented to increase storage capacity, then element density is improved, but manufacturing complexity increases
Solution Approach 1:
The manufacturing process is segmented into repetitive steps of forming conductive structures, forming insulating structures, and forming conductive layers. Each step follows a standardized pattern that can be repeated to build the stacked structure layer by layer, making the complex 3D manufacturing process more manageable and controllable.
Solution Approach 2:
The patent forms conductive structures and insulating structures in a predetermined stacked arrangement before the final implantation process. This preliminary structuring allows subsequent manufacturing steps to proceed more efficiently with reduced complexity, as the basic architecture is already in place to guide further processing.
3Quantity of substance
If conventional implantation process is used to achieve high element density, then storage capacity is improved, but manufacturing cost increases
Solution Approach 1:
The implantation process is segmented and distributed across multiple stacked layers. Instead of requiring extremely high energy concentrated in a single layer to achieve high density, the same total element density is achieved by distributing implants across multiple layers, each receiving lower energy doses that are less costly and less damaging.
Solution Approach 2:
By moving to a three-dimensional stacked architecture, the patent achieves high element density without proportionally increasing manufacturing cost. The vertical stacking allows efficient use of the implantation process across multiple layers, reducing the need for expensive high-energy single-layer implantation while maintaining high storage capacity.
Data Source
AI summary
A semiconductor structure and a manufacturing method of the same are provided. The semiconductor structure includes a substrate, a first stacked structure, and a first conductive layer. The first stacked structure is formed on the substrate and includes a conductive structure and an insulating structure, and the conductive structure is disposed adjacent to the insulating structure. The first conductive layer is formed on the substrate and surrounds two side walls and a part of the top portion of the first stacked structure for exposing a portion of the first stacked structure.