Semiconductor Stack Snubber Capacitor Layout

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Solution Overview

Problem

High leakage inductance in commutation loops of power electronic circuits leads to voltage spikes and reduced switching speed in semiconductor switches, limiting the performance of two-level converters.

Innovation Solution

A semiconductor stack with a compact design featuring multiple parallel-connected snubber capacitors and a frame that fixes these capacitors to the stack, along with cooling elements and semiconductor switches, forms multiple commutation loops with reduced leakage inductance, utilizing snubber diodes and resistors to prevent oscillations and resonances.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a single large capacitor is used to reduce leakage inductance, then the commutation loop inductance is reduced, but the space utilization and structural compactness deteriorate

Engineering Contradiction:
Improveswitching speedVSAvoidspace utilization
Core Design Contradiction:
SpeedVSVolume of moving object

Solution Approach 1:

The patent divides a single large capacitor into multiple smaller snubber capacitors (typically two or more) that are distributed around the semiconductor stack. This segmentation allows the capacitors to be positioned closer to the semiconductor switches, reducing the commutation loop area and leakage inductance while improving space utilization and structural compactness

Inventive Principle:
Principle #1Segmentation

2Speed

If snubber capacitors are arranged laterally on the presspack, then the commutation loop size is reduced, but the device complexity increases

Engineering Contradiction:
Improveswitching speedVSAvoidstructural complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent combines the snubber capacitors with the semiconductor stack structure by mechanically fixing them to the frame that already holds the semiconductor switches and cooling elements. This integration merges the snubber circuit into the existing presspack structure, reducing overall device complexity while maintaining the benefits of reduced commutation loop size

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10164519B2Semiconductor stack for converter with snubber capacitors
Publication Date: 2018.12.25 HITACHI ENERGY LTD
  • US10164519B2 patent drawing
  • US10164519B2 patent drawing
  • US10164519B2 patent drawing

AI summary

A semiconductor stack for a converter comprises two series-connected semiconductor switches; two terminals for connecting a cell capacitor, which are connected to one another by the two semiconductor switches; at least one cooling element arranged between the semiconductor switches; a frame, by which the semiconductor switches and the cooling element are fixed to one another and which provides the terminals; and at least two snubber capacitors which are mechanically fixed to the frame and which are connected in parallel, are connected to the terminals and which in each case form a commutation loop with the semiconductor switches.