Semiconductor Storage Bit Line Voltage Control for Write Margin
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Solution Overview
Problem
The miniaturization of semiconductor devices leads to increased manufacturing variation in memory cells, resulting in decreased write margins and higher write failure rates at low voltages, particularly in low-power devices, where the yield of memory cells is compromised due to dynamic voltage and frequency scaling (DVFS) methods.
Innovation Solution
A semiconductor storage device with a storage element, a bit line that inverts data upon step-down to reference voltage, a first step-down circuit that adjusts bit line voltage to a predetermined value, and a control circuit that detects voltage changes between inverters with different delay dependencies to control the step-down amount, ensuring reliable operation and power efficiency across varying voltage ranges.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If power supply voltage is reduced to low levels for power consumption reduction, then power efficiency is improved, but write margin decreases and write failure rate increases
Solution Approach 1:
The bit line voltage is stepped down to a predetermined value equal to or below the reference voltage before the write operation is executed. This preliminary voltage adjustment ensures that even at low power supply voltages, the write margin is maintained by creating a sufficient voltage difference between the bit line and storage element, thereby preventing write failures while operating at low power consumption levels
Solution Approach 2:
The invention dynamically adjusts the bit line voltage parameter based on the power supply voltage level. By controlling the step-down amount of bit line voltage according to detected voltage changes, the system adapts to varying power supply conditions and maintains reliable write operations across different voltage ranges, resolving the contradiction between low power consumption and write reliability
2Reliability
If assist operations are continuously applied to maintain write margins, then reliability is improved, but power consumption increases
Solution Approach 1:
The control circuit automatically detects voltage changes and controls the step-down amount of bit line voltage without requiring external assist operations. The system self-adjusts to maintain write margins by monitoring voltage dependencies of inverter delays and dynamically controlling the bit line voltage, eliminating the need for continuous power-consuming assist operations while ensuring reliable write operations
Solution Approach 2:
The invention implements dynamic control of bit line voltage based on real-time detection of power supply voltage changes. The step-down amount is adjusted dynamically according to the detected voltage changes and inverter delay characteristics, allowing the system to maintain write margins only when necessary (at low voltages) rather than continuously, thereby reducing unnecessary power consumption while preserving reliability
Data Source
AI summary
A semiconductor storage device includes: a storage element that holds data; a bit line that is coupled to the storage element and in which step-down to reference voltage causes data held in the storage element to be inverted, a first step-down circuit that steps down bit line voltage to a first predetermined value equal to or below the reference voltage, the bit line voltage being voltage applied to the bit line; and a control circuit that detects a first voltage change based on a first output from a first inverter which has a voltage dependence of an occurring delay and a second output from a second inverter in which a voltage dependence of an occurring delay is larger than that of the first inverter, and that controls a step-down amount of the bit line voltage by the first step-down circuit depending on an amount of the detected first voltage change.