Semiconductor Storage Device Coupling Capacitance Stabilization
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Solution Overview
Problem
In NAND flash memory, the increasing coupling capacitance between adjacent memory cells causes fluctuations in threshold voltage, leading to instability in data storage and retrieval, especially when writing data in one cell affects the adjacent cells.
Innovation Solution
The implementation of a memory cell array with a controller that manages data storage and retrieval by simultaneously selecting and writing to multiple memory cells, using flag cells and boosting cells to stabilize threshold voltages and prevent interference, and adjusting read voltages based on data from adjacent cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are shrunk to increase storage density, then storage capacity is improved, but coupling capacitance between adjacent cells increases causing threshold voltage fluctuation
Solution Approach 1:
The patent divides the memory cell array into groups where cells are written in a specific sequence (e.g., even-numbered cells first, then odd-numbered cells). This segmentation approach isolates the writing operations to reduce cumulative coupling capacitance effects on threshold voltage, thereby maintaining stability while achieving high storage density through cell shrinkage.
Solution Approach 2:
The patent applies preliminary compensation by writing to adjacent cells in a controlled sequence before the threshold voltage fluctuation becomes problematic. By anticipating the coupling capacitance effect and managing the write sequence in advance (e.g., writing to non-adjacent cells alternately), the system pre-empts voltage instability issues.
2Productivity
If data is written in adjacent memory cells, then storage utilization is improved, but threshold voltage of previously-written cells fluctuates due to coupling capacitance
Solution Approach 1:
The writing operation is segmented into multiple passes or stages. Instead of writing to all adjacent cells simultaneously or in arbitrary sequence, the patent divides the write operation to process cells in groups (e.g., by row, by column, or by parity), reducing the coupling capacitance impact on already-written cells while maintaining high overall storage utilization.
Solution Approach 2:
The patent implements periodic writing sequences where cells are written in alternating patterns (e.g., even cells then odd cells, or alternating rows). This periodic approach allows previously-written cells to stabilize before adjacent cells are written, mitigating threshold voltage fluctuation while achieving complete storage utilization over the write cycle.
3Quantity of substance
If multi-level data is stored in memory cells, then storage capacity is improved, but threshold voltage precision requirements increase making data more sensitive to coupling capacitance
Solution Approach 1:
The patent applies preliminary compensation techniques where the threshold voltage is adjusted or compensated for before multi-level data writing. By pre-managing the voltage state of memory cells and using compensation algorithms, the system reduces the impact of coupling capacitance on the precise threshold voltage levels required for multi-level data storage.
Solution Approach 2:
The patent implements feedback mechanisms where the actual threshold voltage of memory cells is measured or monitored, and write operations are adjusted based on this feedback. This closed-loop approach compensates for coupling capacitance effects in real-time, maintaining the precision required for multi-level data storage while maximizing storage capacity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach stabilizes data storage and retrieval by minimizing the impact of coupling capacitance, ensuring accurate and efficient multi-level data storage and read operations, even when writing to one cell affects adjacent cells.
Implementation Method 1
a coupling capacitance between the memory cells adjacent to each other tends to increase with the shrinking of an element, a threshold voltage of the previously-written memory cell fluctuates according to the write of the adjacent memory cell
Data Source
AI summary
According to one embodiment, a semiconductor storage device includes a memory cell array and a controller. The memory cell array includes a first memory cell, a second memory cell, a third memory cell, and a fourth memory cell. The controller writes data having n values (n is natural numbers of 2 or more to k or less) in the second memory cell and simultaneously writes the fourth memory cell, after writing the data having the n values in the first memory cell. When reading the data from the first memory cell, the controller reads data of the first memory cell and the third memory cell which is selected simultaneously with the first memory cell and, changes a read voltage of the first memory cell based on the data read from the third memory cell.