Semiconductor Storage Device DLA Read Operation for Threshold Voltage Shift Correction

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Solution Overview

Problem

NAND-type flash memory devices face challenges in preventing read errors due to variations in threshold voltages of memory cells, which can shift due to coupling between adjacent word lines during write operations, leading to decreased reliability and performance.

Innovation Solution

The semiconductor storage device employs a direct look-ahead (DLA) read operation that involves multiple read processes with varying discharge times and voltages to correct for threshold voltage shifts, ensuring accurate data retrieval by selectively using read results from different states.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multiple read processes with different discharge times are performed to correct threshold voltage shifts, then read accuracy is improved, but read operation time increases

Engineering Contradiction:
Improveread accuracyVSAvoidread operation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent performs a first read operation before the second read operation to obtain preliminary information about the threshold voltage state. Based on the result of the first read, the controller decides whether a second read with different discharge time is necessary, thereby preparing in advance and avoiding unnecessary additional read operations

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements a multi-stage read approach where a first read with one discharge time is performed, and a second read with a different discharge time is conditionally performed only when needed. This partial action approach ensures high read accuracy by using multiple discharge times when necessary, while avoiding the time penalty of always performing both reads

Inventive Principle:
Principle #16Partial or excessive action

2Measurement precision

If the discharge time of the sense node is extended to detect threshold voltage shifts, then detection precision is improved, but operation speed decreases

Engineering Contradiction:
Improvedetection precisionVSAvoidoperation speed
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The patent dynamically adjusts the discharge time of the sense node based on the read stage and detected conditions. The first read uses one discharge time setting while the second read uses a different discharge time setting, allowing the system to optimize between speed and precision dynamically rather than using a fixed discharge time

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs periodic read operations with alternating discharge time characteristics. By performing sequential reads with different discharge times and selecting results based on threshold voltage shift detection, the system achieves both high detection precision and maintains operational speed through structured periodic measurement cycles

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS11302399B2Semiconductor storage device and reading method thereof
Publication Date: 2022.04.12 KIOXIA CORP
  • US11302399B2 patent drawing
  • US11302399B2 patent drawing
  • US11302399B2 patent drawing

AI summary

A semiconductor storage device includes first and second memory cells, first and second word lines connected to the first and second memory cells, respectively, a bit line connected to the first and second memory cells, and a sense amplifier including a sense node. During a first read, a controller applies a first read voltage to the second word line and determines a read result. During a second read, the controller discharges the sense node for a first time period while applying a second read voltage to the first word line to determine a first read result, and discharges the sense node for a second time period while applying the second read voltage to determine a second read result. The controller determines read data based on the first read result, the second read result, and the read result of the second memory cell.