Semiconductor Storage Device Laser Marking Reliability
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Solution Overview
Problem
The existing semiconductor storage devices face challenges in maintaining the reliability and characteristics of large-capacity memory cards due to the risk of damage from laser marks, particularly when the laser mark is formed on the surface of thin sealers overlying memory chips or wirings, which can lead to penetration and corrosion.
Innovation Solution
The semiconductor storage device design includes forming the laser mark on a surface of the sealer that does not face the top surface of the semiconductor chip, thereby avoiding direct exposure and potential damage, and ensuring the sealer's thickness is sufficient to prevent laser penetration, even for high-capacity devices like 64 GB memory cards.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the laser mark is formed on the surface of the sealer facing the memory chip, then the marking is easily accessible and readable, but the laser may penetrate the thin sealer and damage the memory chip or wirings
Solution Approach 1:
The patent applies dimensionality change by moving the laser mark from the top surface (first surface) of the sealer to the bottom surface (second surface) that does not face the memory chip. This spatial relocation in another dimension allows the mark to remain accessible for reading while eliminating the risk of laser penetration damaging the chip or wirings underneath.
Solution Approach 2:
The sealer itself acts as an intermediary that protects the memory chip from direct laser exposure. By forming the mark on the opposite surface of the sealer from the chip side, the sealer material serves as a protective barrier that absorbs or blocks the laser energy, preventing it from reaching the sensitive electronic components.
2Quantity of substance
If the sealer thickness is reduced to accommodate high-capacity memory chips, then the device capacity increases, but the laser mark may penetrate through and cause corrosion
Solution Approach 1:
The patent resolves this contradiction by changing the dimensional position of the laser mark from the chip-facing surface to the opposite surface of the sealer. This allows the sealer thickness to be reduced for high-capacity chips without compromising protection, as the laser now marks the far side of the sealer where penetration would not reach the chip.
Solution Approach 2:
The patent extracts the laser mark from the problematic location (top surface near the chip) and relocates it to a safe location (bottom surface away from the chip). This separation allows the sealer thickness to be optimized for high-capacity storage while the mark remains intact and readable on the protected surface.
3Ease of manufacture
If the laser mark is formed on the thin sealer surface, then the marking process is simple and direct, but the mark may cause corrosion of underlying components
Solution Approach 1:
The patent maintains manufacturing simplicity by using the same laser marking process, but changes the marking location to the opposite surface of the sealer. This dimensional change allows the process to remain straightforward while eliminating the harmful corrosion effect on underlying components.
Solution Approach 2:
The sealer serves as an intermediary barrier that protects underlying components from laser-induced corrosion. By marking the far side of the sealer from the components, the sealer material absorbs the laser energy and prevents it from reaching and corroding the sensitive electronic parts underneath.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach secures the reliability and characteristics of the semiconductor storage device by preventing damage to the laminated chip and wirings, while also improving manufacturing yields and flexibility in component layout.
Implementation Method 1
when the laser mark is formed on the surface of thin sealers overlying memory chips or wirings
Data Source
AI summary
A semiconductor storage device of the present embodiments includes a substrate, a first semiconductor chip and a sealer. The substrate has wirings. The first semiconductor chip is connected to the wirings on the substrate. The sealer has a first surface, which does not face a top surface of the first semiconductor chip and is provided with a mark, and seals the first semiconductor chip.