Semiconductor Storage Structure for Multi-Depth Via Formation

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Solution Overview

Problem

The existing manufacturing processes for semiconductor storage devices face challenges in efficiently forming via holes with varying depths and preventing short-circuits between conductive layers, which increases the number of manufacturing processes and costs.

Innovation Solution

The method involves forming a semiconductor storage device with a specific configuration of conductive layers and contacts, where support structures are provided at a predetermined density to facilitate the formation of via holes with different depths through repeated patterning and etching, reducing the risk of short-circuits and manufacturing costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If via holes with varying depths are formed through repeated patterning and etching, then manufacturing precision is improved, but device complexity increases

Engineering Contradiction:
Improvevia hole depth controlVSAvoidnumber of manufacturing processes
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent divides the via hole formation process into multiple stages by introducing support structures at different depths. These support structures act as temporary boundaries that enable selective etching to different depths in different regions, allowing precise control of via hole depths without requiring excessive patterning cycles.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Support structures are formed in advance before the final via hole formation. These preliminary structures serve as etch stop layers that pre-define the depth boundaries for subsequent etching processes, eliminating the need for multiple iterative patterning and etching cycles to achieve varying via hole depths.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If support structures are provided at predetermined density, then reliability is improved by preventing short-circuits, but manufacturing cost increases

Engineering Contradiction:
Improveshort-circuit preventionVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The support structures are distributed at predetermined densities in specific regions where short-circuit risks are highest. This localized approach provides enhanced reliability where needed while avoiding unnecessary manufacturing complexity in regions where short-circuit prevention is less critical, thereby optimizing the balance between reliability and manufacturing cost.

Inventive Principle:
Principle #3Local quality

3Productivity

If via holes with varying depths are formed, then productivity is improved, but manufacturing precision may deteriorate due to structural distortion

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidstructural integrity
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

Support structures are strategically positioned to act as cushioning elements that prevent structural distortion during the via hole formation process. These structures provide mechanical support to surrounding conductive layers during etching, preventing collapse or deformation that would compromise manufacturing precision while enabling efficient formation of via holes with varying depths.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS12057399B2Semiconductor storage device
Publication Date: 2024.08.06 KIOXIA CORP
  • US12057399B2 patent drawing
  • US12057399B2 patent drawing
  • US12057399B2 patent drawing

AI summary

A semiconductor storage device includes a semiconductor substrate and a conductive layer separated from the semiconductor substrate in a first direction. The conductive layer extends in a second direction parallel to the semiconductor substrate. A semiconductor layer extends in the first direction through the conductive layer. A first contact extends in the first direction and is connected to a surface of the conductive layer facing away from the semiconductor substrate. A first insulating layer extends in the first direction, and a second insulating layer extends along the first insulating layer in the first direction. Each of the first and second insulating layers entirely overlaps with the first contact when viewed in the first direction.