Dynamic Voltage Control for Semiconductor Storage Read Accuracy
Solution Overview
Problem
Existing semiconductor storage devices face challenges in efficiently controlling voltage during read operations, particularly in maintaining reading accuracy while reducing operation voltage and preventing unintended threshold voltage increases.
Innovation Solution
The semiconductor storage device incorporates a voltage generation circuit that supplies a read voltage to the global word line, along with first and second block decoders that manage selection signals for transfer transistors. During read operations, the power voltage is dynamically changed between set values to optimize voltage control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the power voltage is reduced during read operations, then energy consumption is lowered, but reading accuracy deteriorates due to insufficient voltage margin
Solution Approach 1:
The patent implements dynamic voltage adjustment by switching between a first power voltage (higher) and a second power voltage (lower) during different phases of the read operation. The voltage is raised during the verify operation to maintain reading accuracy, then lowered during subsequent read operations to reduce energy consumption, creating a dynamic voltage control strategy that balances accuracy and energy efficiency
Solution Approach 2:
The patent employs periodic voltage adjustment where the power voltage is cyclically switched between higher and lower levels. After an initial read operation at higher voltage to establish accurate threshold voltage distribution, subsequent read operations use lower voltage periodically, creating a periodic pattern that maintains accuracy while reducing overall energy consumption
2Measurement precision
If the read voltage is increased to improve reading accuracy, then measurement precision is improved, but unintended threshold voltage increases occur in memory cells
Solution Approach 1:
The patent changes the power voltage parameter dynamically during read operations. By adjusting the power voltage supplied to the block decoder between different levels, the patent optimizes the voltage applied to memory cells during verify operations, preventing unintended threshold voltage increases while maintaining sufficient reading accuracy through controlled voltage parameters
3Device complexity
If the voltage control is simplified to reduce device complexity, then ease of operation is improved, but voltage control precision deteriorates
Solution Approach 1:
The patent introduces a voltage generation circuit as an intermediary component that includes a switch controlled by control logic. This switch mediates between the power source and the block decoder, enabling precise voltage control by selectively connecting different voltage levels. The intermediary structure maintains voltage control precision while keeping the overall device complexity manageable through a dedicated voltage control module
Data Source
AI summary
A semiconductor storage device of an embodiment includes a plurality of blocks, a voltage supply circuit configured to generate read voltage Vr to be supplied to signal lines, a block decoder capable of setting, for each of the selected blocks, whether the read voltage Vr is applied to word lines, and a sequencer configured to perform operation that reads data. The voltage supply circuit generates power voltage VRD and power voltage VBB that is negative voltage and supplies these voltages to the block decoder. During the reading operation, a value of the power voltage VRD is changed between voltage Vhr and voltage Vlr and a value of the power voltage VBB is changed between voltage Vhb and voltage Vlb. The voltage Vhr is larger than zero volt, and the voltage Vlb is lower than zero volt.