Semiconductor Storage Device Segmented Bit Lines
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Solution Overview
Problem
In resistive memory devices, the increase in the number of memory cells operated simultaneously leads to a significant voltage drop due to parasitic resistance in the wiring, which can prevent sufficient voltage/current from being applied to memory cells, affecting the performance of set, reset, and read operations.
Innovation Solution
The semiconductor storage device employs a control circuit that selectively drives memory cells by applying different voltages to bit lines and word lines, with specific arrangements of bit lines and word lines to minimize voltage drops, ensuring that memory cells can be operated efficiently even when a large number are accessed simultaneously.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a larger number of memory cells are operated simultaneously to improve processing speed, then the processing speed increases, but a larger voltage drop is caused due to parasitic resistance of wirings
Solution Approach 1:
The bit line is divided into multiple segments (first bit line segment and second bit line segment) that are separately driven. This segmentation allows independent voltage control of different regions, enabling sufficient voltage to be applied to memory cells even when many cells are operated simultaneously, thus resolving the voltage drop issue while maintaining high processing speed.
2Quantity of substance
If memory cell arrays are arranged laminated in a three-dimensional manner to achieve large capacity without increasing cell array area, then the storage density increases, but the wiring complexity and parasitic resistance increase
Solution Approach 1:
The bit line is divided into multiple segments (first bit line segment and second bit line segment) that are separately driven. This segmentation allows independent voltage control of different regions, enabling sufficient voltage to be applied to memory cells even when many cells are operated simultaneously, thus resolving the voltage drop issue while maintaining high processing speed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for the effective performance of operations on a large number of memory cells without voltage drop issues, ensuring reliable data storage and retrieval in high-density memory cell arrays.
Implementation Method 1
Resistive memory has attracted increased attention as a likely candidate for replacing flash memory. As described herein, it is assumed that the resistive memory devices include Resistive RAM (ReRAM), in a narrow sense, that uses a transition metal oxide as a recording layer and stores its resistance states in a non-volatile manner
Implementation Method 2
a control circuit selectively driving the first and second wirings, in applying, by the control circuit, a certain potential difference to a selected memory cell positioned at an intersection between the first and second wirings
Data Source
AI summary
A semiconductor storage device includes: a memory cell array having memory cells positioned at respective intersections between a plurality of first wirings and a plurality of second wirings, each of the memory cells having a rectifier element and a variable resistance element connected in series; and a control circuit selectively driving the first and second wirings. The plurality of first wirings that are specified and selectively driven at the same time by one of a plurality of address signals are separately arranged with other first wirings interposed therebetween within the memory cell array when a certain potential difference is applied to a selected memory cell positioned at an intersection between the first and second wirings by the control circuit.