Semiconductor Storage Device Voltage Step-Up Circuit Architecture
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Solution Overview
Problem
Current semiconductor storage devices face challenges in achieving improved voltage step-up performance while minimizing circuit area, particularly in read operations where efficient voltage supply to word lines is crucial for data retrieval.
Innovation Solution
The semiconductor storage device incorporates a voltage step-up circuit configuration with multiple charge pumps and regulators that dynamically adjust voltage levels, allowing for efficient voltage supply to selected and non-selected word lines during read operations, and enables assistive voltage step-up between memory chips to optimize performance and reduce circuit complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple charge pumps are used to improve voltage step-up performance, then voltage supply stability is improved, but circuit area increases
Solution Approach 1:
The voltage step-up function is divided into two independent charge pumps: a first charge pump dedicated to selected word lines and a second charge pump dedicated to non-selected word lines. This segmentation allows each pump to be optimized for its specific function, improving voltage supply stability while controlling overall circuit area through functional specialization.
Solution Approach 2:
The first charge pump serves multiple purposes: it supplies voltage to selected word lines during read operations and assists the second charge pump during voltage step-up operations. This multi-functionality reduces the need for additional dedicated circuits, thereby controlling circuit area while maintaining voltage supply stability.
2Productivity
If assist operation between memory chips is implemented, then voltage step-up efficiency is improved, but device complexity increases
Solution Approach 1:
Multiple memory chips are merged into a single system where their charge pumps work cooperatively. The first charge pump of one chip assists the second charge pump of another chip during voltage step-up operations, combining their capabilities to achieve higher efficiency without requiring separate dedicated circuits for each function.
Solution Approach 2:
Each memory chip contains its own charge pumps that can independently perform voltage step-up and assist other chips. This self-service capability eliminates the need for external assistance circuits, reducing overall system complexity while maintaining high voltage step-up efficiency through inter-chip cooperation.
3Productivity
If dynamic voltage adjustment is implemented, then read operation efficiency is improved, but control complexity increases
Solution Approach 1:
The charge pumps dynamically adjust their operation based on real-time conditions: the first charge pump activates during read operations to supply voltage to selected word lines, while the second charge pump activates during voltage step-up operations. This dynamic adjustment optimizes read operation efficiency while the automated control logic manages complexity.
Solution Approach 2:
The system incorporates feedback mechanisms where the controller monitors voltage levels and operational states, automatically activating or deactivating charge pumps as needed. This feedback-based control ensures optimal read operation efficiency while reducing the perceived control complexity through automated decision-making.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances read operation efficiency by ensuring stable and efficient voltage supply to word lines, reducing ripple voltage and circuit area requirements, thereby improving overall storage device performance and reliability.
Implementation Method 1
a first voltage step-up circuit and a second voltage step-up circuit. During a read operation executed in the first memory chip, the first voltage step-up circuit, the second voltage step-up circuit
Implementation Method 2
The regulator circuit may include a comparator, an operational amplifier, or other voltage regulation components
Data Source
AI summary
A semiconductor storage device includes a first memory chip having a first memory cell, a first word line connected to the first memory cell, a first voltage step-up circuit, and a second voltage step-up circuit, and a second memory chip having a second memory cell, a second word line connected to the second memory cell, a third voltage step-up circuit, and a fourth voltage step-up circuit. During a read operation executed in the first memory chip, the first, second, and fourth voltage step-up circuits supply a first voltage to the first word line, and when a voltage of the first word line reaches a predetermined voltage, the first voltage step-up circuit continues to supply the first voltage to the first word line, and the second voltage step-up circuit and the fourth voltage step-up circuit stop supplying the first voltage to the first word line.