Semiconductor Strobe Signal Generation Using Phase-Shifted Clocks
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Solution Overview
Problem
Semiconductor devices face challenges in generating stable strobe signals due to variations in process, voltage, or temperature (PVT), which affect data synchronization and stability.
Innovation Solution
A semiconductor device that generates strobe signals from an internal clock during the enable period of a masking clock and outputs these signals through repeaters to a pad, utilizing a control circuit to produce internal clocks with different phases and a signal mixing circuit to amplify these signals for transmission to pads.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If strobe signals are generated directly without masking clock control, then the circuit complexity is reduced, but the stability of strobe signals under PVT variations deteriorates
Solution Approach 1:
The patent applies preliminary action by generating masking clocks in advance based on latency signals before the actual data transfer occurs. The masking clocks are prepared beforehand to control when strobe signals are enabled, ensuring that strobe signals are only output during valid data periods. This preliminary preparation of timing control signals resolves the contradiction by establishing a robust timing framework that maintains strobe signal stability without requiring complex real-time adjustment circuits.
Solution Approach 2:
The patent implements dynamics by making the strobe signal generation dynamic and conditional rather than static. The signal mixing circuit dynamically enables or disables strobe signals based on the enable periods of masking clocks, which vary according to latency conditions and data transfer requirements. This dynamic control mechanism allows the system to adapt strobe signal output to actual operating conditions, maintaining stability across PVT variations without excessive circuit complexity.
2Measurement precision
If multiple internal clocks with different phases are generated and mixed, then the precision of data synchronization is improved, but the device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the clock generation into multiple phase-segregated internal clocks (first, second, third, and fourth internal clocks with different phases). Each internal clock is responsible for specific timing requirements, and the signal mixing circuit selectively combines them based on data transfer needs. This segmentation allows precise synchronization control for different data operations while keeping each individual clock generation circuit relatively simple, resolving the contradiction between synchronization precision and overall device complexity.
Solution Approach 2:
The patent implements universality through the signal mixing circuit, which serves multiple functions: it selects appropriate internal clocks based on timing requirements, mixes them to generate strobe signals, and controls their enable periods through masking clocks. This multi-functional circuit consolidates what could be separate complex circuits into a single versatile unit, achieving high synchronization precision without proportionally increasing device complexity.
3Device complexity
If strobe signals are transmitted without amplification through repeaters, then the device complexity is reduced, but the signal stability over transmission distance deteriorates
Solution Approach 1:
The patent applies the intermediary principle by introducing repeaters as intermediate signal transmission components. These repeaters act as mediators between the signal mixing circuit and external pads, receiving weak strobe signals, regenerating them with proper amplitude, and re-transmitting them. This intermediary approach ensures signal stability over transmission distance without requiring excessively complex transmission circuits, as the repeaters are standard, well-understood components that reliably perform signal regeneration.
Data Source
AI summary
A semiconductor device includes a control circuit configured to receive a clock and generate first to fourth internal clocks which have different phases, and generate first to fourth masking clocks from a latency signal in synchronization with the first internal clock and the second internal clock depending on a mode signal; and a signal mixing circuit configured to output the first to fourth internal clocks as first to fourth strobe signals during enable periods of the first to fourth masking clocks.