Semiconductor Support Pattern Penetrating Stacked Layers
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Solution Overview
Problem
Current semiconductor devices face challenges in reliably forming 3-dimensional memory cells on substrates, leading to performance limitations and fabrication issues due to stress and deformation in interlayer insulating patterns.
Innovation Solution
The semiconductor device incorporates alternately stacked conductive and interlayer insulating patterns with a support pattern that penetrates these layers, having a smaller width than the isolation patterns, to prevent warping and deformation, ensuring the integrity of the vertical structures and interlayer insulating patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If vertical structures are formed to penetrate conductive and interlayer insulating patterns, then device density and integration are improved, but stress and deformation in interlayer insulating patterns occur leading to reliability issues
Solution Approach 1:
The support pattern is divided into multiple portions (first portions and second portions) with different widths, where each portion provides targeted support to different structural elements. The first portions support interlayer insulating patterns while the second portions support conductive patterns, preventing warping and deformation in both types of structures simultaneously.
Solution Approach 2:
The support pattern acts as an intermediary structural element that mediates between the vertical structures and the alternating conductive and interlayer insulating patterns. By penetrating through these patterns and providing differential width support, it stabilizes the entire stack structure without interfering with the electrical functionality of the conductive patterns.
2Area of stationary object
If support pattern width is reduced to fit between structures, then space utilization is improved, but structural support capability deteriorates
Solution Approach 1:
The support pattern implements local quality by having different widths at different locations. The first portions have a first width optimized for supporting interlayer insulating patterns, while the second portions have a second width optimized for supporting conductive patterns. This localized differentiation allows the support pattern to provide adequate structural support throughout while maintaining compact overall dimensions.
Data Source
AI summary
Provided is a semiconductor device that includes first and second isolation patterns disposed on a substrate. Alternately stacked interlayer insulating patterns and a conductive patterns are disposed on a surface of the substrate between the first and second isolation patterns. A support pattern penetrates the conductive patterns and the interlayer insulating patterns and has a smaller width than the first and second isolation patterns. First and second vertical structures are disposed between the first isolation and the support pattern and penetrate the conductive patterns and the interlayer insulating patterns. A second vertical structure is disposed between the second isolation pattern and the support pattern and penetrates the conductive patterns and the interlayer insulating patterns. A distance between top and bottom surfaces of the support pattern is greater than a distance between a bottom surface of the support pattern and the surface of the substrate.