Semiconductor Switch Sub-Transistor Voltage Segmentation
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Solution Overview
Problem
Cross-point memory devices face challenges in managing high voltage differences across transistors, which can lead to transistor damage and inefficiencies in selecting input signals due to the complexity of voltage selection and application.
Innovation Solution
A semiconductor switch design incorporating sub-switches with specific voltage configurations and logic circuits to reduce the maximum applied voltage across transistors, allowing for efficient selection of input signals by managing voltage differences between PMOS and NMOS transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If high voltage differences are applied across transistors in cross-point memory devices, then write operation capability is improved, but transistor damage risk increases
Solution Approach 1:
The patent divides the voltage selection process into multiple sub-switches (first sub-switch and second sub-switch) that operate at different voltage levels. This segmentation allows the circuit to handle high voltage differences through staged voltage application rather than direct application, reducing stress on individual transistors while maintaining the capability to perform write operations requiring high voltage differences.
Solution Approach 2:
The patent introduces intermediate voltage levels (third voltage and fourth voltage) that serve as mediators between the high voltage first voltage and ground. These intermediate voltages are applied to the gates of transistors in a controlled sequence, acting as buffer stages that prevent direct exposure to full voltage stress while enabling the necessary voltage differential for memory write operations.
2Productivity
If complex voltage selection circuits are used to manage multiple voltage levels, then signal selection efficiency is improved, but device complexity increases
Solution Approach 1:
The voltage selection function is segmented into multiple independent sub-switches, each controlled by dedicated control signals. This segmentation allows each sub-switch to be optimized for specific voltage transitions, improving overall signal selection efficiency while distributing the complexity across modular units rather than requiring a single complex selection circuit.
Solution Approach 2:
The patent applies preliminary voltage selection by pre-establishing control signal levels that correspond to desired voltage transitions. The control signals are prepared in advance with specific voltage levels (first, second, third, and fourth voltages) that directly correspond to the operational states needed, eliminating the need for complex real-time voltage negotiation and simplifying the selection logic.
Data Source
AI summary
A semiconductor switch according to an embodiment includes: a first sub-switch and a second sub-switch. A first input signal is inputted into the first sub-switch and a second input signal is inputted into the second sub-switch. The first input signal is either a first voltage or a third voltage, the second input signal is either a second voltage or a fourth voltage, the second voltage is lower than the first voltage, the third voltage is lower than the first voltage and the fourth voltage is lower than the third voltage. The second voltage is inputted into the second sub-switch when an output from the first sub-switch is outputted from the semiconductor switch, and the third voltage is inputted into the first sub-switch when an output from the second sub-switch is outputted from the semiconductor switch.