Semiconductor Target Address Storage Circuit for Refresh Operations
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Solution Overview
Problem
As semiconductor devices become more integrated, the reduced distance between memory cells and word lines leads to data loss due to coupling and interference phenomena, necessitating effective address counting and refresh operations to maintain data integrity.
Innovation Solution
A semiconductor device is designed with a target address storage circuit to count and store the selection of blocks based on logic level combinations of an address, and row address generation circuits to generate addresses for executing refresh operations, ensuring data retention by identifying frequently accessed blocks and generating sequential row addresses for refresh operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the distance between word lines is reduced to increase integration, then device integration is improved, but data loss due to coupling and interference phenomena increases
Solution Approach 1:
The patent implements a target address storage circuit that proactively identifies and stores addresses of frequently accessed blocks before data loss occurs. The circuit counts block selections and stores target addresses when a threshold is reached, enabling preemptive refresh operations that restore data before coupling and interference phenomena cause permanent loss.
2Reliability
If address counting and refresh operations are implemented to prevent data loss, then data retention is improved, but device complexity increases
Solution Approach 1:
The target address storage circuit serves multiple functions: it counts block selections, identifies frequently accessed blocks, stores target addresses, and triggers refresh operations. This multi-functional design consolidates what could be separate complex circuits into a single integrated unit, reducing overall device complexity while maintaining data retention.
Solution Approach 2:
The circuit automatically monitors its own operation by counting block selections and self-triggers refresh operations when target blocks are identified. This self-service mechanism eliminates the need for external control logic, simplifying the overall system while ensuring reliable data retention through automated refresh operations.
Data Source
AI summary
A semiconductor device may be provided. The semiconductor device may include a target address storage circuit and a first row address generation circuit. The target address storage circuit may be configured to count the number of times that blocks are selected by a plurality of logic level combinations of an address based on an active pulse. The target address storage circuit may be configured to store and output the address of a target block, which is selected at least a predetermined number of times, among the blocks as a target address. The first row address generation circuit may be configured to generate a first row address, which is counted, from the target address based on a first internal command.