Semiconductor Device Terminal Arrangement for Wiring Simplicity

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Solution Overview

Problem

Conventional power semiconductor devices face complex wiring challenges due to the intersection of wires connected to P-terminals, N-terminals, power supply terminals, and GND terminals, making it difficult to achieve simple wiring, especially in high-current-capacity modules, which often require multi-layer substrates or jumper wires.

Innovation Solution

A semiconductor device with a half-bridge configuration where P-terminals and N-terminals are connected to the high-side and low-side ends of the half-bridge, respectively, and power supply and GND terminals are positioned orthogonally to the power output terminal, allowing for non-intersecting wire connections and simplified mounting by incorporating wires within the package.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If the main terminals and control circuit terminals are disposed on opposite sides of the package, then the device can be mounted, but the wires connected to P-terminal, N-terminal, and output terminal intersect with each other, complicating the wiring

Engineering Contradiction:
Improvewiring simplicityVSAvoidwiring complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent applies dimensional arrangement by disposing control circuit terminals on the same side as main terminals rather than on opposite sides. This repositioning in the spatial dimension allows wires to be routed without intersection, transforming a complex three-dimensional wiring problem into a simpler planar arrangement that eliminates wire crossings while maintaining all necessary electrical connections

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Power

If high-current-capacity modules are used, then higher current can be handled, but sufficient cross-section area of wire pattern on substrate becomes difficult to achieve

Engineering Contradiction:
Improvecurrent capacityVSAvoidsubstrate wiring complexity
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The patent merges the control circuit terminals with the main terminal arrangement by disposing them on the same side of the package. This consolidation allows the control circuit wiring to share the same substrate area and routing space as the main power terminals, enabling sufficient wire pattern cross-section area to be achieved without requiring separate dedicated space that would complicate the substrate design

Inventive Principle:
Principle #5Merging (Combining)

3Power

If multi-layer substrate or jumper wire is used to achieve sufficient wire cross-section area, then high current capacity can be achieved, but the device complexity and manufacturing difficulty increase

Engineering Contradiction:
Improvecurrent capacityVSAvoidmanufacturing simplicity
Core Design Contradiction:
PowerVSEase of manufacture

Solution Approach 1:

The patent resolves the manufacturing complexity issue by repositioning control circuit terminals on the same side as main terminals, which allows all necessary wire connections to be achieved on a single-layer substrate without requiring multi-layer construction or external jumper wires. This dimensional reconfiguration maintains high current capacity while simplifying the manufacturing process to use standard single-layer substrate technology

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS10886202B2Semiconductor device
Publication Date: 2021.01.05 MITSUBISHI ELECTRIC CORP
  • US10886202B2 patent drawing
  • US10886202B2 patent drawing
  • US10886202B2 patent drawing

AI summary

Provided is a semiconductor device capable of having simple wiring in mounting the semiconductor device. The semiconductor device includes at least one P-terminal, at least one N-terminal, a power output terminal, at least one power supply terminal, at least one ground (GND) terminal, at least one control terminal, and a package that is rectangular in a plan view and accommodates an insulated gate bipolar transistor (IGBT) being a high-side switching element, an IGBT being a low-side switching element, and a control circuit. The at least one control terminal is disposed on a first side of the package, opposite to a second side on which the power output terminal is disposed. The at least one P-terminal, the at least one N-terminal, the at least one power supply terminal, and the at least one GND terminal are disposed on a third side of the package, orthogonal to the second side.