3D Semiconductor Chip Test Data Compression via Dedicated Channels
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Solution Overview
Problem
Current compression test methods are inadequate for multi-chip packaged 3D semiconductor apparatuses, as they fail to effectively test individual chips after packaging, leading to inaccurate results due to mixed data levels when test data is outputted through shared channels.
Innovation Solution
A semiconductor apparatus with first and second chips sharing data channels, where each chip compresses and outputs test data through dedicated channels in response to control signals, allowing for chip-by-chip testing by generating and outputting compression data through respective data channels in the first test mode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If chips are stacked and connected by silicon via to reduce package area, then integration density is improved, but test accuracy deteriorates due to mixed data levels from shared channels
Solution Approach 1:
The patent divides the shared data channel into separate dedicated data channels for each chip. Each chip has its own data channel (first data channel for first chip, second data channel for second chip) that is exclusively used for outputting test data from that specific chip, preventing data mixing and enabling accurate individual chip testing while maintaining the stacked configuration.
2Loss of time
If compression test is performed on multi-chip apparatus, then test time is reduced, but test reliability deteriorates due to inability to test individual chips
Solution Approach 1:
The patent enables segmentation of test operations by providing dedicated data channels for each chip. This allows the test system to selectively test individual chips (first chip through first data channel, second chip through second data channel) while maintaining compression test efficiency, thus preserving both test time reduction and test reliability.
Solution Approach 2:
The patent introduces control signals as intermediaries that manage the test process. The control signal activates specific chips for testing and routes their data through dedicated channels, enabling reliable individual chip testing within the compression test framework without requiring physical separation of chips.
3Measurement precision
If dedicated data channels are provided for each chip, then test accuracy is improved, but device complexity increases
Solution Approach 1:
The patent applies universality by using identical dedicated data channel structures for multiple chips. Each chip is equipped with the same type of data channel and control mechanism, allowing the system to handle multiple chips with a standardized approach rather than requiring unique complex routing for each chip, thus reducing overall device complexity while maintaining test accuracy.
Data Source
AI summary
A semiconductor apparatus includes first and second chips sharing first and second data channels. The first chip compresses first test data of the first chip and outputs the compressed first test data through the first data channel in a first test mode, and the second chip compresses second test data of the second chip and outputs the compressed second test data through the second data channel in the first test mode.