Semiconductor Test Delay Compensator for Turnaround Variations
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Solution Overview
Problem
Existing test apparatuses for semiconductor chips lack the ability to accurately account for variations in turnaround delay due to power, voltage, and temperature changes, which degrades the reliability of test operations by not compensating for asynchronous delays.
Innovation Solution
A test apparatus that includes a delay compensator to generate delayed read data by calculating the difference between an external turnaround delay value and a detected turnaround delay value, allowing for accurate comparison with reference data to determine test results.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the test apparatus uses a fixed turnaround delay value for comparison, then the test operation is simple, but the reliability of the test operation is degraded due to variations in power, voltage, and temperature
Solution Approach 1:
The patent applies preliminary action by measuring the turnaround delay before the actual test operation and storing this measured value for subsequent use. The delay measurement unit measures the turnaround delay in advance, and this pre-measured value is then used by the determination unit to compare with the read data, eliminating the need to use a fixed delay value and improving reliability without adding complex real-time adjustment mechanisms.
Solution Approach 2:
The patent implements feedback by using the measured turnaround delay value to adjust the comparison operation. The delay measurement unit continuously measures the actual turnaround delay, and this measured value feeds back to the determination unit, which uses it to dynamically adjust the comparison timing, ensuring accurate test results despite variations in power, voltage, and temperature conditions.
2Measurement precision
If the test apparatus compensates for turnaround delay variations, then the test accuracy is improved, but the test operation complexity increases
Solution Approach 1:
The patent introduces an intermediary component - the delay measurement unit - that acts as a mediator between the read command issuance and the read data comparison. This unit measures the actual turnaround delay and provides this information to the determination unit, which uses it to adjust the comparison operation, thereby achieving high measurement accuracy without requiring complex compensation circuits.
Solution Approach 2:
The test apparatus applies self-service by having the determination unit use its own internally measured turnaround delay value for comparison, rather than relying on externally provided fixed values. The apparatus measures its own delay characteristics and uses this self-obtained information to perform accurate test operations, improving both precision and autonomy.
3Reliability
If the test apparatus uses externally provided turnaround delay values, then the device structure is simple, but the test reliability is insufficient due to lack of information on delay variations
Solution Approach 1:
The patent merges the delay measurement function with the test operation itself. The delay measurement unit is integrated into the test apparatus and performs delay measurements as part of the normal test operation flow, combining the measurement of turnaround delay with the read command issuance and data comparison processes, thereby enabling reliable delay detection without requiring separate measurement equipment.
Solution Approach 2:
The test apparatus performs self-measurement of its own turnaround delay characteristics. The delay measurement unit measures the delay that occurs within the apparatus itself during normal operation, providing the determination unit with accurate, apparatus-specific delay information that reflects actual variations in power, voltage, and temperature conditions.
Data Source
AI summary
A test apparatus may be provided. The test apparatus may include a delay compensator configured to generate delayed read data by delaying read data according to a difference between an external turnaround delay value provided externally from the test apparatus and a turnaround delay detection value detected within the test apparatus. The test apparatus may include a determination circuit configured to perform a test result determination operation by comparing the delayed read data with reference data. The turnaround delay detection value may be generated by detecting a time of from a point of time when write data including a read command as the reference data is output to a point of time when the read data is received.