Semiconductor Test Device Oscillation Signal Routing

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Solution Overview

Problem

In semiconductor integrated circuit manufacturing, testing transistors for performance is challenging due to increasing size and speed, requiring effective methods to detect minute differences that could cause defects, and existing test devices lack efficient ways to output and analyze performance results.

Innovation Solution

A test device for semiconductor integrated circuits that includes an oscillation unit generating multiple oscillation signals in response to test mode signals, a switching unit selecting and outputting activated signals, a frequency division unit dividing signals at predetermined ratios, and a data buffer unit outputting these signals through a data pad, allowing for effective monitoring of transistor performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multiple oscillation signals are generated to test transistor performance, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improvetransistor performance measurement precisionVSAvoidtest device complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

Multiple oscillation circuits are integrated into a single test device structure, sharing common control and output pathways. The oscillation circuits, switching unit, frequency division unit, and data buffer unit are combined into a unified system that can selectively activate different oscillation circuits based on test requirements, reducing overall device complexity while maintaining multiple testing capabilities.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The test device is designed with multi-functional capabilities where a single device can perform multiple transistor performance tests by selectively activating different oscillation circuits. The switching unit enables one data pad to serve multiple functions by routing signals from different oscillation circuits, allowing the device to test various transistor characteristics without requiring separate dedicated test devices for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If multiple oscillation circuits are integrated into one test device, then productivity is improved, but device complexity increases

Engineering Contradiction:
Improvetransistor testing productivityVSAvoidtest device complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The test device is segmented into distinct functional modules: multiple oscillation circuits, a switching unit, a frequency division unit, and a data buffer unit. Each module performs a specific function, allowing for independent optimization and maintenance while working together to achieve high productivity. The segmentation enables parallel test preparation while maintaining a unified output pathway through the single data pad.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The switching unit provides dynamic signal routing capability, allowing the test device to flexibly switch between different oscillation circuits based on test requirements. This dynamic configuration enables the device to adapt to different testing scenarios without physical reconfiguration, improving productivity by allowing rapid transition between different transistor performance tests while maintaining a relatively simple fixed hardware structure.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8432179B2Test device for testing transistor characteristics in semiconductor integrated circuit
Publication Date: 2013.04.30 SK HYNIX INC
  • US8432179B2 patent drawing
  • US8432179B2 patent drawing
  • US8432179B2 patent drawing

AI summary

A test device of a semiconductor integrated circuit includes: an oscillation unit including a plurality of oscillation circuits and configured to activate the respective oscillation circuits in response to a test mode signal and output a plurality of oscillation signals; a switching unit configured to extract only an activated signal among the plurality of oscillation signals; a frequency division unit configured to divide a signal outputted from the switching unit at a predetermined division ratio and generate a divided oscillation signal; and a data buffer unit configured to buffer the divided oscillation signal to output through a data pad.