Semiconductor Integrated Circuit Test Signal Interrupting Element
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing semiconductor integrated circuits face challenges in accurately inspecting signal terminals due to differences in input voltage ranges between probe and non-probe terminals, leading to reliability issues and inaccurate testing.
Innovation Solution
A semiconductor integrated circuit design that includes a test object chip with a probe terminal and a test object terminal, connected via common wiring, and equipped with switches and a test signal interrupting element to prevent current flow when inputting test signals, ensuring accurate inspection regardless of voltage differences.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a common wiring connects probe terminal and test object terminal for inspection, then terminal inspection capability is improved, but through current flows causing reliability degradation and inaccurate inspection
Solution Approach 1:
The patent applies preliminary action by introducing a test signal interrupting element that proactively blocks test signals before they can cause harmful through current. The interrupting element is positioned in advance in the signal path and activates during test modes to prevent current flow before reliability issues can occur, rather than reacting after damage occurs.
Solution Approach 2:
The test signal interrupting element serves as an intermediary between the probe terminal and test object terminal. It mediates the test signal flow by selectively blocking it during inspection operations, preventing the harmful through current while still allowing the common wiring to function for signal transmission during normal operation.
2Adaptability or versatility
If probe terminal and test object terminal are connected through common wiring, then inspection function is improved, but voltage range mismatch causes through current
Solution Approach 1:
The patent applies preliminary anti-action by using the test signal interrupting element to preemptively counteract the harmful effect of voltage range mismatch. The element is designed to detect when a test signal is being applied and automatically interrupts the signal path before the voltage difference can drive harmful through current through the common wiring.
Solution Approach 2:
The interrupting element acts as an intermediary that isolates the probe terminal and test object terminal when voltage conflicts occur. It allows the common wiring to maintain its versatile inspection function while blocking the harmful current path caused by voltage range mismatches between differently configured terminals.
3Productivity
If inter-chip wiring connects signal terminals in package interior, then signal transmission between chips is improved, but terminal inspection becomes difficult
Solution Approach 1:
The patent applies universality by making the common wiring serve multiple functions: it acts as an inter-chip signal transmission path during normal operation and simultaneously serves as an inspection path when the test signal interrupting element is activated. This multi-functionality eliminates the need for separate inspection wiring while maintaining full signal transmission capability.
Solution Approach 2:
The interrupting element enables preliminary action by preparing the signal path for inspection mode in advance. During testing, the element is positioned to allow signal flow to the test object terminal while blocking the harmful return path, enabling inspection before the chip is fully packaged and making terminal measurement feasible through the existing inter-chip wiring structure.
Data Source
AI summary
A semiconductor integrated circuit includes: a package; semiconductor chips in the package including a signal terminal; and a wiring connecting signal terminals. One semiconductor chip is a test object chip including a probe terminal and a test object terminal. The probe terminal connects to an external terminal for testing the test object terminal. The test object chip further includes: a common wiring for connecting the probe terminal and the test object terminal; a first switch for connecting/disconnecting the probe terminal and the common wiring; a second switch for connecting/disconnecting the test object terminal and the common wiring; and a test signal interrupting element for interrupting the test signal to be inputted into an input circuit of the probe terminal.


