Semiconductor Thermal Sensor Embedded in Interconnect Structure
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Solution Overview
Problem
High device density in semiconductor structures leads to heat accumulation, causing performance deterioration, and existing thermal sensor technologies are not fully satisfactory in monitoring and controlling on-chip hot spots in real-time.
Innovation Solution
A semiconductor structure with thermal sensors configured to monitor temperature in real-time and create 2D/3D temperature profile mapping, where the thermal sensors are fabricated using Front-end-of-line (FEOL) and/or back-end-of-line (BEOL) processes, and are compatible with these processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If device density is increased to improve integration, then productivity and functionality are improved, but heat accumulation increases causing performance deterioration
Solution Approach 1:
The patent divides the thermal management function into multiple thermal sensors distributed across different locations in the semiconductor device. Each sensor independently monitors temperature in its local region, allowing segmented thermal detection and control throughout the high-density integrated circuit.
Solution Approach 2:
The patent implements a feedback mechanism where thermal sensors continuously monitor temperature and provide signals to control circuits. These control circuits adjust operational parameters or activate cooling mechanisms based on temperature feedback, creating a closed-loop thermal management system that responds to heat accumulation in real-time.
2Reliability
If thermal sensors are added to monitor temperature, then temperature control capability is improved, but device complexity increases
Solution Approach 1:
The patent merges the thermal sensor functionality with existing semiconductor fabrication processes. Thermal sensors are integrated using standard FEOL and BEOL process steps, combining temperature monitoring capability with the existing device manufacturing flow without requiring entirely separate fabrication lines or additional complex processing equipment.
Solution Approach 2:
The patent designs thermal sensors that can be integrated into various locations and configurations within different semiconductor device architectures. The sensor design is universal and adaptable, allowing the same basic sensor structure to monitor temperature in CPUs, GPUs, memory devices, and other integrated circuits with minimal modification.
3Productivity
If real-time temperature monitoring is implemented, then performance optimization is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent performs preliminary thermal sensor integration during the FEOL (Front-End-Of-Line) and BEOL (Back-End-Of-Line) manufacturing stages. By embedding thermal sensors early in the fabrication process rather than adding them later, the sensors are formed as part of the standard manufacturing flow, ensuring proper alignment and integration without requiring additional precision steps after device assembly.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively monitors and controls temperature across semiconductor structures, enhancing performance and reliability by providing real-time temperature data and dynamic temperature control.
Implementation Method 1
a resistive heater embedded in the first interconnect structure and configured to heat the first semiconductor substrate
Implementation Method 2
the thermal sensor(s) may be configured to monitor temperature of the hot spots on-chip and in real time
Data Source
AI summary
A semiconductor structure includes a first interconnect structure disposed over a first semiconductor substrate and a thermal sensing device. The thermal sensing device includes a first transistor, a second transistor, a first capacitor coupled to the first transistor, a second capacitor coupled to the second transistor, and a metallization pattern embedded in the first interconnect structure and serving as a resistive heater. At least one selected from the group of the first and second transistors is embedded in the first interconnect structure.