Semiconductor Device With Threshold-Modulating Film
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Solution Overview
Problem
The two-transistor type DRAM faces challenges with short retention time and frequent refresh operations due to small capacitance and noise issues, making it difficult to maintain data integrity and reading functionality.
Innovation Solution
Incorporating a threshold-modulating film in the read transistor's gate structure, which can trap charge and modulate the threshold voltage, allowing for lower write voltage and improved retention time, and using a block insulation film to prevent charge leakage, along with a semiconductor device configuration that includes write and read transistors connected through bit lines and word lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a two-transistor type DRAM is used to shrink device size, then device area is reduced, but retention time becomes short and frequent refresh operations are required
Solution Approach 1:
The patent introduces a vertical stack structure with multiple gate electrodes (first gate electrode, second gate electrode, third gate electrode) stacked above the semiconductor region. This three-dimensional configuration increases the effective gate control area without expanding the planar device footprint, thereby maintaining small device area while improving charge storage capacity and retention time
Solution Approach 2:
The patent employs a composite gate structure consisting of multiple gate electrodes with different configurations (first gate electrode connected to bit line, second gate electrode isolated, third gate electrode connected to word line) and a block insulation film. This composite structure enables independent control of charge storage and retrieval operations, improving both retention time and reading functionality
2Quantity of substance
If gate capacitance is small in two-transistor type DRAM, then device size is reduced, but refresh operations become frequent
Solution Approach 1:
By stacking multiple gate electrodes vertically, the patent increases the effective gate capacitance without proportionally increasing device area. The multi-layer gate structure provides greater charge storage capacity, reducing the frequency of refresh operations needed to maintain data integrity
3Ease of operation
If normal reading is attempted in two-transistor type DRAM, then reading operation is required, but noise prevents successful reading
Solution Approach 1:
The patent separates the reading function from the charge storage function by introducing a dedicated third gate electrode that is selectively activated during read operations. This isolated gate structure allows reading operations to be performed without disturbing the charge stored in the floating gate, thereby reducing noise and enabling successful reading
Solution Approach 2:
The block insulation film acts as an intermediary barrier between the floating gate and the control gates. During read operations, this insulation layer prevents charge leakage and noise interference from the control gates from affecting the stored charge, enabling clean signal detection
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration extends retention time, improves reading speed, reduces power consumption, and enhances noise resistance, enabling normal reading operations without frequent refresh cycles.
Implementation Method 1
Incorporating a threshold-modulating film in the read transistor's gate structure, which can trap charge and modulate the threshold voltage
Implementation Method 2
using a block insulation film to prevent charge leakage
Data Source
AI summary
A semiconductor device according to an embodiment includes: a first transistor including a gate connected to a first interconnection, a first source, and a first drain, one of the first source and the first drain being connected to a second interconnection; and a second transistor including a gate structure, a second source, and a second drain, one of the second source and second drain being connected to a third interconnection and the other of the second source and second drain being connected to a fourth interconnection. The gate structure includes a gate insulation film, a gate electrode, and a threshold-modulating film provided between the gate insulation film and the gate electrode to modulate a threshold voltage, the other of the first source and first drain of the first transistor is connected to the gate electrode.