Semiconductor Through Electrodes for Miniaturization

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Solution Overview

Problem

The existing methods for manufacturing semiconductor devices with through electrodes are inefficient, leading to increased device size due to wire bonding, difficulty in miniaturization, and damage to the device forming layer during dry etching, especially when forming fine through holes with high aspect ratios, and are unsuitable for optoelectronic elements that require light transmission or emission.

Innovation Solution

A method involving the formation of through electrodes with a collar-like connection portion and a rod-like connection portion, where the device forming layer is protected using resist layers and metal layers to prevent plasma damage and oxidation, allowing for the creation of void-free through electrodes that enable miniaturization and maintain optical functionality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If wire bonding is used to connect electrode pads to wiring patterns, then electrical connections are established, but the device size increases due to the space required for pulling out wires

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoiddevice size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent extracts the harmful element (wire bonding process and associated space requirements) from the system by implementing through-electrode technology. The through electrodes are formed directly in the substrate, eliminating the need for external wire bonding and the space it requires, thus achieving miniaturization while maintaining electrical connectivity

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent transitions from a surface-level connection approach (wire bonding on the device surface) to a through-dimensional approach (vertical through-electrodes penetrating the substrate). This dimensional change allows electrical connections to be made through the substrate thickness rather than around it, reducing the horizontal space required and enabling device miniaturization

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If flip-chip connection with solder bumps is used to connect electrode pads, then device size is reduced, but light transmission is blocked by the wiring substrate

Engineering Contradiction:
Improvedevice sizeVSAvoidlight transmission
Core Design Contradiction:
Area of stationary objectVSIllumination intensity

Solution Approach 1:

The patent applies local quality by forming through electrodes only in specific regions where electrical connections are needed, while leaving other regions of the substrate transparent for light transmission. The through electrodes are localized to contact areas, allowing the majority of the substrate to maintain its optical properties

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent uses the substrate itself as an intermediary that simultaneously provides mechanical support, electrical connectivity through through-electrodes, and optical transmission. By integrating multiple functions into the substrate, it eliminates the need for separate wiring substrates that would block light

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If dry etching is used to form fine through holes with high aspect ratios, then through electrodes can be created, but the device forming layer is damaged by plasma atmosphere

Engineering Contradiction:
Improvethrough hole formation precisionVSAvoidplasma damage to device forming layer
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by forming a protective resist mask on the device forming layer before the dry etching process. This mask is applied in advance to shield the sensitive device forming layer from plasma damage during the through-hole formation process, allowing precise etching without compromising the underlying structure

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements beforehand cushioning by depositing a metal protective layer on the device forming layer prior to dry etching. This metal layer acts as a cushion or barrier that absorbs or deflects plasma energy, preventing direct damage to the device forming layer while allowing the etching process to proceed with high precision

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

4Ease of manufacture

If through electrodes are formed without protective layers, then manufacturing is simplified, but the device forming layer is exposed to plasma damage and oxidation

Engineering Contradiction:
Improvethrough electrode fabrication simplicityVSAvoiddevice forming layer integrity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent introduces protective intermediaries (resist masks and metal protective layers) that mediate between the harsh dry etching plasma environment and the sensitive device forming layer. These intermediaries enable the through-hole formation process to proceed while simultaneously protecting the device forming layer from damage and oxidation

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces simple mechanical drilling or punching methods with a controlled dry etching process that uses plasma chemistry for precise material removal. This substitution allows for finer precision and better control over the through-hole formation while the protective layers ensure the device forming layer remains intact throughout the process

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the miniaturization of semiconductor devices while protecting the device forming layer, ensuring reliable electrical connections and maintaining the optical functionality of optoelectronic elements by forming through electrodes that do not obstruct light reception or emission.

Implementation Method 1

a first resist layer is formed on one surface side of the semiconductor element... protecting the device forming layer when an opening is formed in the center of the resist layer and the electrode pad by etching

Methodology Applied
Scientific EffectPlasma: Plasma

Implementation Method 2

the device forming layer is protected using resist layers and metal layers to prevent plasma damage and oxidation

Methodology Applied
Scientific EffectOxidation: Oxidation

Data Source

PatentEP1760782B1Method of manufacturing a semiconductor device
Publication Date: 2016.11.02 SHINKO ELECTRIC IND CO LTD
  • EP1760782B1 patent drawingFigure 1
  • EP1760782B1 patent drawingFigure 2~3A
  • EP1760782B1 patent drawingFigure 3B~3C

AI summary

A semiconductor device 50 is constructed to connect Al electrode pads 20 and rewiring patterns 52 via through electrodes 56 and flip-chip connect the rewiring patterns 52 of a semiconductor element 14 and wiring patterns 24 on a wiring substrate 12 via solder bumps 58. A device forming layer 18 and a plurality of Al electrode pads 20 are formed on an upper surface of the semiconductor element 14. Through holes 54 passing through the semiconductor element 14 are provided between the Al electrode pads 20 and the rewiring patterns 52 by the dry etching, and through electrodes 56 are formed in insides of the through holes 54 by the Cu plating. The device forming layer 18 is arranged on an upper surface of the semiconductor element 14 to make a light reception and a light emission easily.