Semiconductor Internal Transmission Path for Low Power HBM

The patent applies parameter changes by dynamically adjusting the reference voltage level used for signal threshold determination. Instead of using a fixed reference voltage, the system varies the reference voltage parameter based on signal conditions to optimize both transmission reliability and power consumption. This allows the receiver to accurately detect signals without requiring high swing levels, thereby reducing power consumption while maintaining reliable transmission.

The patent implements feedback mechanisms through decision feedback equalizers (DFE) that use previously detected signal levels to adjust current signal interpretation. The system feeds back information about signal quality and timing to dynamically adjust reference levels and equalization parameters, enabling reliable signal reception at lower power consumption levels by compensating for signal degradation through intelligent feedback control rather than brute-force voltage increases.

The patent extends parameter changes to multi-channel systems by applying dynamic reference voltage adjustment across multiple internal I/O channels. Each channel or group of channels can have optimized reference voltage levels based on their specific signal characteristics and timing requirements. This allows the system to support thousands of internal I/Os for high bandwidth while keeping individual channel power consumption low through parameter optimization rather than uniform high-voltage operation.

The patent applies segmentation by dividing the large number of internal I/Os into manageable groups or channels, each with independently optimized reference voltage levels and timing parameters. This segmentation allows selective power management where not all channels need to operate at maximum performance simultaneously, enabling high aggregate bandwidth while controlling total power consumption through selective activation and optimization of individual channel segments.