Semiconductor Device Triangular Square Lattice Memory Holes
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Solution Overview
Problem
In the manufacturing of three-dimensional memory chips, the reduction of chip size is hindered by the formation of large voids or irregularities in the electrode layer when memory holes are not appropriately arranged, leading to structural issues.
Innovation Solution
A semiconductor device is designed with a specific arrangement of first and second columnar portions in a triangular and square or rectangular lattice pattern, respectively, within insulating films, allowing for efficient stacking and alignment of electrode layers to minimize chip size while preventing void formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If memory holes are arranged with smaller distance to reduce chip size, then chip area is reduced, but large voids form in the electrode layer
Solution Approach 1:
The patent introduces insulating films between adjacent columnar portions to create an asymmetric arrangement pattern. This asymmetric design with insulating films separating columnar portions prevents the formation of large voids in the electrode layer while enabling closer spacing of memory holes, thus reducing chip area without compromising electrode layer uniformity
Solution Approach 2:
The insulating films act as intermediary elements placed between adjacent columnar portions. These intermediary insulating films fill the spaces between columnar portions and provide a barrier that prevents void formation in the electrode layer, enabling closer memory hole arrangement while maintaining manufacturing precision
2Area of stationary object
If memory holes are arranged with smaller distance, then chip size is reduced, but structural integrity deteriorates due to void formation
Solution Approach 1:
Insulating films are introduced as intermediary structures between adjacent columnar portions. These insulating films maintain the structural integrity of the memory device by preventing void formation in the electrode layer, enabling closer memory hole spacing while preserving the stability of the object's composition
Solution Approach 2:
The patent applies local quality by placing insulating films specifically in the regions between adjacent columnar portions where voids would form. This localized intervention maintains structural integrity in critical areas while allowing overall chip size reduction through closer memory hole arrangement
Data Source
AI summary
A semiconductor device includes a first film that includes first electrode layers separated from each other in a first direction and extending in second and third directions, first columnar portions in the first film, that include a charge storage layer and a first semiconductor layer, and extend in the first direction, a second film on the first film and including second electrode layers separated from each other in the first direction and extending in second and third directions, second columnar portions in the second film and on the first columnar portions, that include a second semiconductor layer and extend in the first direction, and first insulating films separated from the second columnar portions in the third direction in the second film and extending in first and second directions. The first columnar portions form a square or rectangular lattice pattern below the first insulating films and a triangular lattice pattern elsewhere.