Semiconductor Structure With Side TSV Connection for Hybrid Bonding
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Solution Overview
Problem
Existing semiconductor manufacturing processes face challenges in efficiently integrating through silicon vias (TSVs) into semiconductor devices, particularly in achieving precise alignment and electrical connectivity during wafer-level packaging, which affects the overall performance and yield of semiconductor devices.
Innovation Solution
A method involving the formation of through silicon vias (TSVs) in semiconductor substrates, followed by fusion bonding with a reclaim silicon substrate, and subsequent planarization processes to create integrated circuit components, enabling precise alignment and electrical connectivity through hybrid bonding techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through silicon vias (TSVs) are integrated into semiconductor devices during wafer-level packaging, then electrical connectivity is improved, but manufacturing complexity increases
Solution Approach 1:
The patent performs preliminary actions by forming TSVs in the first substrate before the bonding process. The TSVs are created with conductive materials and insulation layers in advance, so that when substrates are bonded, electrical connectivity is already established without adding complexity to the bonding process itself.
Solution Approach 2:
The patent segments the manufacturing process into distinct stages: TSV formation in the first substrate, bonding to the second substrate, and subsequent planarization. This segmentation allows each process to be optimized independently, improving electrical connectivity through precise TSV formation while managing manufacturing complexity through process modularization.
2Ease of manufacture
If fusion bonding with reclaim silicon substrate is performed, then manufacturing cost is reduced, but alignment precision may deteriorate
Solution Approach 1:
The patent introduces an intermediary approach by using a reclaim silicon substrate that has been prepared with specific surface characteristics. The substrate preparation process creates optimal bonding surfaces that facilitate both cost-effective reuse of materials and precise alignment during the fusion bonding process.
Solution Approach 2:
The patent replaces mechanical alignment systems with fusion bonding technology that inherently provides alignment through the bonding process itself. The fusion bonding mechanism naturally aligns the substrates during bonding, eliminating the need for complex external mechanical alignment systems while reducing costs through material reuse.
3Reliability
If planarization processes are applied after bonding, then device performance is improved, but manufacturing time increases
Solution Approach 1:
The patent merges the planarization process with subsequent manufacturing steps by performing planarization immediately after bonding while the structure is still in an optimal state. This integration allows the planarization to be combined with other processing steps, improving device performance through proper surface preparation while minimizing the time penalty by avoiding separate dedicated planarization stages.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances the integration of TSVs in semiconductor devices, improving electrical connectivity and reducing manufacturing costs while maintaining high yield and performance of semiconductor components.
Implementation Method 1
a reclaim silicon substrate and a first substrate are fusion bonded to one another
Data Source
AI summary
A semiconductor structure includes a first semiconductor device, a second semiconductor device, a connection device and a redistribution circuit structure. The first semiconductor device is bonded on the second semiconductor device. The connection device is bonded on the second semiconductor device and arranged aside of the first semiconductor device, wherein the connection device includes a first substrate and conductive vias penetrating through the first substrate and electrically connected to the second semiconductor device. The redistribution circuit structure is located over the second semiconductor device, wherein the first semiconductor device and the connection device are located between the redistribution circuit structure and the second semiconductor device. The redistribution circuit structure and the first semiconductor device are electrically connected to the second semiconductor device through the conductive vias of the connection device.


